.lower_to_scalar = true,
.has_imul24 = true,
.lower_wpos_pntc = true,
+
+ /* Only needed for the spirv_to_nir() pass done in ir3_cmdline.c
+ * but that should be harmless for GL since 64b is not
+ * supported there.
+ */
+ .lower_int64_options = (nir_lower_int64_options)~0,
};
/* we don't want to lower vertex_id to _zero_based on newer gpus: */
.has_imul24 = true,
.max_unroll_iterations = 32,
.lower_wpos_pntc = true,
+
+ /* Only needed for the spirv_to_nir() pass done in ir3_cmdline.c
+ * but that should be harmless for GL since 64b is not
+ * supported there.
+ */
+ .lower_int64_options = (nir_lower_int64_options)~0,
};
const nir_shader_compiler_options *
OPT(s, nir_opt_dce);
}
progress |= OPT(s, nir_opt_if, false);
+ progress |= OPT(s, nir_opt_loop_unroll, nir_var_all);
progress |= OPT(s, nir_opt_remove_phis);
progress |= OPT(s, nir_opt_undef);
} while (progress);
ir3_nir_lower_layer_id(nir_shader *nir)
{
unsigned layer_id_loc = ~0;
- nir_foreach_variable(var, &nir->inputs) {
+ nir_foreach_shader_in_variable(var, nir) {
if (var->data.location == VARYING_SLOT_LAYER) {
layer_id_loc = var->data.driver_location;
break;
break;
case MESA_SHADER_TESS_CTRL:
NIR_PASS_V(s, ir3_nir_lower_tess_ctrl, so, so->key.tessellation);
- NIR_PASS_V(s, ir3_nir_lower_to_explicit_input);
+ NIR_PASS_V(s, ir3_nir_lower_to_explicit_input, so->shader->compiler);
progress = true;
break;
case MESA_SHADER_TESS_EVAL:
progress = true;
break;
case MESA_SHADER_GEOMETRY:
- NIR_PASS_V(s, ir3_nir_lower_to_explicit_input);
+ NIR_PASS_V(s, ir3_nir_lower_to_explicit_input, so->shader->compiler);
progress = true;
break;
default:
progress |= OPT(s, ir3_nir_lower_layer_id);
}
if (so->key.color_two_side) {
- OPT_V(s, nir_lower_two_sided_color);
+ OPT_V(s, nir_lower_two_sided_color, true);
progress = true;
}
switch (intr->intrinsic) {
case nir_intrinsic_get_buffer_size:
+ if (ir3_bindless_resource(intr->src[0]))
+ break;
idx = nir_src_as_uint(intr->src[0]);
if (layout->ssbo_size.mask & (1 << idx))
break;