freedreno/afuc: Fix printing preemptleave on a5xx

[mesa.git] / src / freedreno / ir3 / ir3_sched.c

diff --git a/src/freedreno/ir3/ir3_sched.c b/src/freedreno/ir3/ir3_sched.c
index bd5471d7f022cc545d6d6d8c9593f02e7ebe3a18..6448987e3c2b71dd58013156dae812d831194ae1 100644 (file)
--- a/src/freedreno/ir3/ir3_sched.c
+++ b/src/freedreno/ir3/ir3_sched.c
@@ -979,6 +979,8 @@ sched_block(struct ir3_sched_ctx *ctx, struct ir3_block *block)
        ctx->addr0 = NULL;
        ctx->addr1 = NULL;
        ctx->pred = NULL;
+       ctx->tex_delay = 0;
+       ctx->sfu_delay = 0;
 
        /* move all instructions to the unscheduled list, and
         * empty the block's instruction list (to which we will