freedreno/ir3/ra: fix array conflicts for split/merged

[mesa.git] / src / freedreno / ir3 / ir3_sched.c

diff --git a/src/freedreno/ir3/ir3_sched.c b/src/freedreno/ir3/ir3_sched.c
index 57567555fd4ab75f00fa9d32bab3302c5d403f5d..6448987e3c2b71dd58013156dae812d831194ae1 100644 (file)
--- a/src/freedreno/ir3/ir3_sched.c
+++ b/src/freedreno/ir3/ir3_sched.c
@@ -195,7 +195,6 @@ schedule(struct ir3_sched_ctx *ctx, struct ir3_instruction *instr)
         * collect srcs as partially live.
         */
        if (n->collect) {
-               struct ir3_instruction *src;
                foreach_ssa_src (src, n->collect) {
                        if (src->block != instr->block)
                                continue;
@@ -248,7 +247,6 @@ struct ir3_sched_notes {
 static bool
 could_sched(struct ir3_instruction *instr, struct ir3_instruction *src)
 {
-       struct ir3_instruction *other_src;
        foreach_ssa_src (other_src, instr) {
                /* if dependency not scheduled, we aren't ready yet: */
                if ((src != other_src) && !is_scheduled(other_src)) {
@@ -413,7 +411,6 @@ static int
 live_effect(struct ir3_instruction *instr)
 {
        struct ir3_sched_node *n = instr->data;
-       struct ir3_instruction *src;
        int new_live = n->partially_live ? 0 : dest_regs(instr);
        int freed_live = 0;
 
@@ -875,7 +872,7 @@ mark_kill_path(struct ir3_instruction *instr)
 {
        struct ir3_sched_node *n = instr->data;
        n->kill_path = true;
-       struct ir3_instruction *src;
+
        foreach_ssa_src (src, instr) {
                if (src->block != instr->block)
                        continue;
@@ -919,8 +916,6 @@ is_output_only(struct ir3_instruction *instr)
 static void
 sched_node_add_deps(struct ir3_instruction *instr)
 {
-       struct ir3_instruction *src;
-
        /* Since foreach_ssa_src() already handles false-dep's we can construct
         * the DAG easily in a single pass.
         */
@@ -984,6 +979,8 @@ sched_block(struct ir3_sched_ctx *ctx, struct ir3_block *block)
        ctx->addr0 = NULL;
        ctx->addr1 = NULL;
        ctx->pred = NULL;
+       ctx->tex_delay = 0;
+       ctx->sfu_delay = 0;
 
        /* move all instructions to the unscheduled list, and
         * empty the block's instruction list (to which we will
@@ -1202,20 +1199,19 @@ add_barrier_deps(struct ir3_block *block, struct ir3_instruction *instr)
  *  (2) reads that come before a write actually get scheduled before the
  *      write
  */
-static void
-calculate_deps(struct ir3_block *block)
-{
-       foreach_instr (instr, &block->instr_list) {
-               if (instr->barrier_class) {
-                       add_barrier_deps(block, instr);
-               }
-       }
-}
-
-void
+bool
 ir3_sched_add_deps(struct ir3 *ir)
 {
+       bool progress = false;
+
        foreach_block (block, &ir->block_list) {
-               calculate_deps(block);
+               foreach_instr (instr, &block->instr_list) {
+                       if (instr->barrier_class) {
+                               add_barrier_deps(block, instr);
+                               progress = true;
+                       }
+               }
        }
+
+       return progress;
 }