* collect srcs as partially live.
*/
if (n->collect) {
- struct ir3_instruction *src;
foreach_ssa_src (src, n->collect) {
if (src->block != instr->block)
continue;
static bool
could_sched(struct ir3_instruction *instr, struct ir3_instruction *src)
{
- struct ir3_instruction *other_src;
foreach_ssa_src (other_src, instr) {
/* if dependency not scheduled, we aren't ready yet: */
if ((src != other_src) && !is_scheduled(other_src)) {
live_effect(struct ir3_instruction *instr)
{
struct ir3_sched_node *n = instr->data;
- struct ir3_instruction *src;
int new_live = n->partially_live ? 0 : dest_regs(instr);
int freed_live = 0;
{
struct ir3_sched_node *n = instr->data;
n->kill_path = true;
- struct ir3_instruction *src;
+
foreach_ssa_src (src, instr) {
if (src->block != instr->block)
continue;
static void
sched_node_add_deps(struct ir3_instruction *instr)
{
- struct ir3_instruction *src;
-
/* Since foreach_ssa_src() already handles false-dep's we can construct
* the DAG easily in a single pass.
*/
ctx->addr0 = NULL;
ctx->addr1 = NULL;
ctx->pred = NULL;
+ ctx->tex_delay = 0;
+ ctx->sfu_delay = 0;
/* move all instructions to the unscheduled list, and
* empty the block's instruction list (to which we will