freedreno/ir3: add helpers to move instructions

[mesa.git] / src / freedreno / ir3 / ir3_shader.c

diff --git a/src/freedreno/ir3/ir3_shader.c b/src/freedreno/ir3/ir3_shader.c
index 8d768e21c3054a3ff8e2b39effb4d2ff5cd3c98e..ddb2c997baf6071d8498476f5505c9f5ef6c4b53 100644 (file)
--- a/src/freedreno/ir3/ir3_shader.c
+++ b/src/freedreno/ir3/ir3_shader.c
@@ -46,10 +46,10 @@ delete_variant(struct ir3_shader_variant *v)
 {
        if (v->ir)
                ir3_destroy(v->ir);
-       if (v->bo)
-               fd_bo_del(v->bo);
+       assert(!v->bo);
        if (v->binning)
                delete_variant(v->binning);
+       free(v->bin);
        free(v);
 }
 
@@ -160,30 +160,18 @@ static void
 assemble_variant(struct ir3_shader_variant *v)
 {
        struct ir3_compiler *compiler = v->shader->compiler;
-       struct shader_info *info = &v->shader->nir->info;
        uint32_t gpu_id = compiler->gpu_id;
-       uint32_t sz, *bin;
 
-       bin = ir3_shader_assemble(v, gpu_id);
-       sz = v->info.sizedwords * 4;
-
-       v->bo = fd_bo_new(compiler->dev, sz,
-                       DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
-                       DRM_FREEDRENO_GEM_TYPE_KMEM,
-                       "%s:%s", ir3_shader_stage(v), info->name);
-
-       memcpy(fd_bo_map(v->bo), bin, sz);
+       v->bin = ir3_shader_assemble(v, gpu_id);
 
        if (shader_debug_enabled(v->shader->type)) {
                fprintf(stdout, "Native code for unnamed %s shader %s:\n",
                        ir3_shader_stage(v), v->shader->nir->info.name);
                if (v->shader->type == MESA_SHADER_FRAGMENT)
                        fprintf(stdout, "SIMD0\n");
-               ir3_shader_disasm(v, bin, stdout);
+               ir3_shader_disasm(v, v->bin, stdout);
        }
 
-       free(bin);
-
        /* no need to keep the ir around beyond this point: */
        ir3_destroy(v->ir);
        v->ir = NULL;
@@ -218,7 +206,7 @@ create_variant(struct ir3_shader *shader, struct ir3_shader_key *key,
        }
 
        assemble_variant(v);
-       if (!v->bo) {
+       if (!v->bin) {
                debug_error("assemble failed!");
                goto fail;
        }
@@ -289,8 +277,65 @@ ir3_shader_destroy(struct ir3_shader *shader)
        free(shader);
 }
 
+/**
+ * Creates a bitmask of the used bits of the shader key by this particular
+ * shader.  Used by the gallium driver to skip state-dependent recompiles when
+ * possible.
+ */
+static void
+ir3_setup_used_key(struct ir3_shader *shader)
+{
+       nir_shader *nir = shader->nir;
+       struct shader_info *info = &nir->info;
+       struct ir3_shader_key *key = &shader->key_mask;
+
+       /* This key flag is just used to make for a cheaper ir3_shader_key_equal
+        * check in the common case.
+        */
+       key->has_per_samp = true;
+
+       if (info->stage == MESA_SHADER_FRAGMENT) {
+               key->fsaturate_s = ~0;
+               key->fsaturate_t = ~0;
+               key->fsaturate_r = ~0;
+               key->fastc_srgb = ~0;
+               key->fsamples = ~0;
+
+               if (info->inputs_read & VARYING_BITS_COLOR) {
+                       key->rasterflat = true;
+                       key->color_two_side = true;
+               }
+
+               if ((info->outputs_written & ~(FRAG_RESULT_DEPTH |
+                                                               FRAG_RESULT_STENCIL |
+                                                               FRAG_RESULT_SAMPLE_MASK)) != 0) {
+                       key->fclamp_color = true;
+               }
+
+               /* Only used for deciding on behavior of
+                * nir_intrinsic_load_barycentric_sample
+                */
+               key->msaa = info->fs.uses_sample_qualifier;
+       } else {
+               key->tessellation = ~0;
+               key->has_gs = true;
+
+               if (info->outputs_written & VARYING_BITS_COLOR)
+                       key->vclamp_color = true;
+
+               if (info->stage == MESA_SHADER_VERTEX) {
+                       key->vsaturate_s = ~0;
+                       key->vsaturate_t = ~0;
+                       key->vsaturate_r = ~0;
+                       key->vastc_srgb = ~0;
+                       key->vsamples = ~0;
+               }
+       }
+}
+
 struct ir3_shader *
-ir3_shader_from_nir(struct ir3_compiler *compiler, nir_shader *nir)
+ir3_shader_from_nir(struct ir3_compiler *compiler, nir_shader *nir,
+               struct ir3_stream_output_info *stream_output)
 {
        struct ir3_shader *shader = CALLOC_STRUCT(ir3_shader);
 
@@ -298,6 +343,11 @@ ir3_shader_from_nir(struct ir3_compiler *compiler, nir_shader *nir)
        shader->compiler = compiler;
        shader->id = p_atomic_inc_return(&shader->compiler->shader_count);
        shader->type = nir->info.stage;
+       if (stream_output)
+               memcpy(&shader->stream_output, stream_output, sizeof(shader->stream_output));
+
+       if (nir->info.stage == MESA_SHADER_GEOMETRY)
+               NIR_PASS_V(nir, ir3_nir_lower_gs);
 
        NIR_PASS_V(nir, nir_lower_io, nir_var_all, ir3_glsl_type_size,
                           (nir_lower_io_options)0);
@@ -330,6 +380,8 @@ ir3_shader_from_nir(struct ir3_compiler *compiler, nir_shader *nir)
                nir_print_shader(shader->nir, stdout);
        }
 
+       ir3_setup_used_key(shader);
+
        return shader;
 }
 
@@ -390,7 +442,6 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
        uint8_t regid;
        unsigned i;
 
-       struct ir3_instruction *instr;
        foreach_input_n (instr, i, ir) {
                reg = instr->regs[0];
                regid = reg->num;