freedreno/ir3: add post-scheduler cp pass

[mesa.git] / src / freedreno / ir3 / ir3_shader.h

diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index 0896bd1b185fb2aa9c658e40f3cb82a5a89c2c95..9fc175595ba031fc0ea5447c44da085f218b2155 100644 (file)
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -225,6 +225,9 @@ struct ir3_sampler_prefetch {
 /* Configuration key used to identify a shader variant.. different
  * shader variants can be used to implement features not supported
  * in hw (two sided color), binning-pass vertex shader, etc.
+ *
+ * When adding to this struct, please update ir3_shader_variant()'s debug
+ * output.
  */
 struct ir3_shader_key {
        union {
@@ -248,7 +251,6 @@ struct ir3_shader_key {
                        unsigned sample_shading : 1;
                        unsigned msaa           : 1;
                        unsigned color_two_side : 1;
-                       unsigned half_precision : 1;
                        /* used when shader needs to handle flat varyings (a4xx)
                         * for front/back color inputs to frag shader:
                         */
@@ -331,9 +333,6 @@ ir3_shader_key_changes_fs(struct ir3_shader_key *key, struct ir3_shader_key *las
        if (last_key->color_two_side != key->color_two_side)
                return true;
 
-       if (last_key->half_precision != key->half_precision)
-               return true;
-
        if (last_key->rasterflat != key->rasterflat)
                return true;
 
@@ -365,64 +364,6 @@ ir3_shader_key_changes_vs(struct ir3_shader_key *key, struct ir3_shader_key *las
        return false;
 }
 
-/* clears shader-key flags which don't apply to the given shader
- * stage
- */
-static inline void
-ir3_normalize_key(struct ir3_shader_key *key, gl_shader_stage type)
-{
-       switch (type) {
-       case MESA_SHADER_FRAGMENT:
-               if (key->has_per_samp) {
-                       key->vsaturate_s = 0;
-                       key->vsaturate_t = 0;
-                       key->vsaturate_r = 0;
-                       key->vastc_srgb = 0;
-                       key->vsamples = 0;
-                       key->has_gs = false; /* FS doesn't care */
-                       key->tessellation = IR3_TESS_NONE;
-               }
-               break;
-       case MESA_SHADER_VERTEX:
-       case MESA_SHADER_GEOMETRY:
-               key->color_two_side = false;
-               key->half_precision = false;
-               key->rasterflat = false;
-               if (key->has_per_samp) {
-                       key->fsaturate_s = 0;
-                       key->fsaturate_t = 0;
-                       key->fsaturate_r = 0;
-                       key->fastc_srgb = 0;
-                       key->fsamples = 0;
-               }
-
-               /* VS and GS only care about whether or not we're tessellating. */
-               key->tessellation = !!key->tessellation;
-               break;
-       case MESA_SHADER_TESS_CTRL:
-       case MESA_SHADER_TESS_EVAL:
-               key->color_two_side = false;
-               key->half_precision = false;
-               key->rasterflat = false;
-               if (key->has_per_samp) {
-                       key->fsaturate_s = 0;
-                       key->fsaturate_t = 0;
-                       key->fsaturate_r = 0;
-                       key->fastc_srgb = 0;
-                       key->fsamples = 0;
-                       key->vsaturate_s = 0;
-                       key->vsaturate_t = 0;
-                       key->vsaturate_r = 0;
-                       key->vastc_srgb = 0;
-                       key->vsamples = 0;
-               }
-               break;
-       default:
-               /* TODO */
-               break;
-       }
-}
-
 /**
  * On a4xx+a5xx, Images share state with textures and SSBOs:
  *
@@ -488,6 +429,9 @@ struct ir3_shader_variant {
        struct ir3_info info;
        struct ir3 *ir;
 
+       /* The actual binary shader instructions, size given by info.sizedwords: */
+       uint32_t *bin;
+
        /* Levels of nesting of flow control:
         */
        unsigned branchstack;
@@ -515,7 +459,8 @@ struct ir3_shader_variant {
         *   + From the vert shader, we only need the output regid
         */
 
-       bool frag_coord, frag_face, color0_mrt;
+       bool frag_face, color0_mrt;
+       uint8_t fragcoord_compmask;
 
        /* NOTE: for input/outputs, slot is:
         *   gl_vert_attrib  - for VS inputs
@@ -592,9 +537,16 @@ struct ir3_shader_variant {
 
        bool need_fine_derivatives;
 
-       /* do we have kill, image write, etc (which prevents early-z): */
+       /* do we have image write, etc (which prevents early-z): */
        bool no_earlyz;
 
+       /* do we have kill, which also prevents early-z, but not necessarily
+        * early-lrz (as long as lrz-write is disabled, which must be handled
+        * outside of ir3.  Unlike other no_earlyz cases, kill doesn't have
+        * side effects that prevent early-lrz discard.
+        */
+       bool has_kill;
+
        bool per_samp;
 
        /* for astc srgb workaround, the number/base of additional
@@ -657,9 +609,20 @@ struct ir3_shader {
        uint32_t id;
        uint32_t variant_count;
 
+       /* Set by freedreno after shader_state_create, so we can emit debug info
+        * when recompiling a shader at draw time.
+        */
+       bool initial_variants_done;
+
        struct ir3_compiler *compiler;
 
        struct ir3_ubo_analysis_state ubo_state;
+
+       /* Number of UBOs loaded by LDC, as opposed to LDG through pointers in
+        * ubo_state.
+        */
+       unsigned num_ubos;
+
        struct ir3_const_state const_state;
 
        struct nir_shader *nir;
@@ -672,6 +635,11 @@ struct ir3_shader {
 
        /* Map from driver_location to byte offset in per-primitive storage */
        unsigned output_loc[32];
+
+       /* Bitmask of bits of the shader key used by this shader.  Used to avoid
+        * recompiles for GL NOS that doesn't actually apply to the shader.
+        */
+       struct ir3_shader_key key_mask;
 };
 
 void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
@@ -690,6 +658,18 @@ ir3_glsl_type_size(const struct glsl_type *type, bool bindless);
  * Helper/util:
  */
 
+/* clears shader-key flags which don't apply to the given shader.
+ */
+static inline void
+ir3_key_clear_unused(struct ir3_shader_key *key, struct ir3_shader *shader)
+{
+       uint32_t *key_bits = (uint32_t *)key;
+       uint32_t *key_mask = (uint32_t *)&shader->key_mask;
+       STATIC_ASSERT(sizeof(*key) % 4 == 0);
+       for (int i = 0; i < sizeof(*key) >> 2; i++)
+               key_bits[i] &= key_mask[i];
+}
+
 static inline int
 ir3_find_output(const struct ir3_shader_variant *so, gl_varying_slot slot)
 {