freedreno: update generated headers
[mesa.git] / src / freedreno / registers / adreno_pm4.xml.h
index 03efbfb29ca73c4123092d54731873895a07c2c3..82b1b6b9f9384e8de2edb33144577410ba9abf8b 100644 (file)
@@ -10,17 +10,17 @@ git clone https://github.com/freedreno/envytools.git
 The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/envytools/rnndb/adreno.xml               (    501 bytes, from 2018-07-03 19:37:13)
 - /home/robclark/src/envytools/rnndb/freedreno_copyright.xml  (   1572 bytes, from 2018-07-03 19:37:13)
-- /home/robclark/src/envytools/rnndb/adreno/a2xx.xml          (  42463 bytes, from 2018-11-19 13:44:03)
+- /home/robclark/src/envytools/rnndb/adreno/a2xx.xml          (  79608 bytes, from 2019-01-21 14:36:17)
 - /home/robclark/src/envytools/rnndb/adreno/adreno_common.xml (  14239 bytes, from 2018-12-05 15:25:53)
-- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml    (  43052 bytes, from 2018-12-21 18:21:34)
+- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml    (  43155 bytes, from 2019-05-03 18:24:29)
 - /home/robclark/src/envytools/rnndb/adreno/a3xx.xml          (  83840 bytes, from 2018-07-03 19:37:13)
 - /home/robclark/src/envytools/rnndb/adreno/a4xx.xml          ( 112086 bytes, from 2018-07-03 19:37:13)
-- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml          ( 147240 bytes, from 2018-12-21 18:21:34)
-- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml          ( 141895 bytes, from 2018-12-21 18:21:34)
+- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml          ( 147240 bytes, from 2019-05-03 18:24:29)
+- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml          ( 148461 bytes, from 2019-05-03 18:24:37)
 - /home/robclark/src/envytools/rnndb/adreno/a6xx_gmu.xml      (  10431 bytes, from 2018-09-14 13:03:07)
 - /home/robclark/src/envytools/rnndb/adreno/ocmem.xml         (   1773 bytes, from 2018-07-03 19:37:13)
 
-Copyright (C) 2013-2018 by the following authors:
+Copyright (C) 2013-2019 by the following authors:
 - Rob Clark <robdclark@gmail.com> (robclark)
 - Ilia Mirkin <imirkin@alum.mit.edu> (imirkin)
 
@@ -232,6 +232,7 @@ enum adreno_pm4_type3_packets {
        CP_SET_MODE = 99,
        CP_LOAD_STATE6_GEOM = 50,
        CP_LOAD_STATE6_FRAG = 52,
+       CP_LOAD_STATE6 = 54,
        IN_IB_PREFETCH_END = 23,
        IN_SUBBLK_PREFETCH = 31,
        IN_INSTR_PREFETCH = 32,
@@ -242,7 +243,6 @@ enum adreno_pm4_type3_packets {
        IN_INCR_UPDT_INSTR = 87,
        PKT4 = 4,
        CP_UNK_A6XX_14 = 20,
-       CP_UNK_A6XX_36 = 54,
        CP_UNK_A6XX_55 = 85,
        CP_REG_WRITE = 109,
 };
@@ -312,13 +312,14 @@ enum a6xx_state_block {
        SB6_GS_SHADER = 11,
        SB6_FS_SHADER = 12,
        SB6_CS_SHADER = 13,
-       SB6_SSBO = 14,
-       SB6_CS_SSBO = 15,
+       SB6_IBO = 14,
+       SB6_CS_IBO = 15,
 };
 
 enum a6xx_state_type {
        ST6_SHADER = 0,
        ST6_CONSTANTS = 1,
+       ST6_IBO = 3,
 };
 
 enum a6xx_state_src {
@@ -471,7 +472,7 @@ static inline uint32_t CP_LOAD_STATE6_0_DST_OFF(uint32_t val)
 {
        return ((val) << CP_LOAD_STATE6_0_DST_OFF__SHIFT) & CP_LOAD_STATE6_0_DST_OFF__MASK;
 }
-#define CP_LOAD_STATE6_0_STATE_TYPE__MASK                      0x00004000
+#define CP_LOAD_STATE6_0_STATE_TYPE__MASK                      0x0000c000
 #define CP_LOAD_STATE6_0_STATE_TYPE__SHIFT                     14
 static inline uint32_t CP_LOAD_STATE6_0_STATE_TYPE(enum a6xx_state_type val)
 {