}
const struct tu_image_view *iview = fb->attachments[a].attachment;
- enum a6xx_depth_format fmt = tu6_pipe2depth(iview->vk_format);
+ const struct tu_render_pass_attachment *attachment =
+ &cmd->state.pass->attachments[a];
+ enum a6xx_depth_format fmt = tu6_pipe2depth(attachment->format);
- tu_cs_emit_regs(cs,
- A6XX_RB_DEPTH_BUFFER_INFO(.depth_format = fmt),
- A6XX_RB_DEPTH_BUFFER_PITCH(tu_image_stride(iview->image, iview->base_mip)),
- A6XX_RB_DEPTH_BUFFER_ARRAY_PITCH(iview->image->layout.layer_size),
- A6XX_RB_DEPTH_BUFFER_BASE(tu_image_view_base_ref(iview)),
- A6XX_RB_DEPTH_BUFFER_BASE_GMEM(cmd->state.pass->attachments[a].gmem_offset));
+ tu_cs_emit_pkt4(cs, REG_A6XX_RB_DEPTH_BUFFER_INFO, 6);
+ tu_cs_emit(cs, A6XX_RB_DEPTH_BUFFER_INFO(.depth_format = fmt).value);
+ tu_cs_image_ref(cs, iview, 0);
+ tu_cs_emit(cs, attachment->gmem_offset);
tu_cs_emit_regs(cs,
A6XX_GRAS_SU_DEPTH_BUFFER_INFO(.depth_format = fmt));
- tu_cs_emit_regs(cs,
- A6XX_RB_DEPTH_FLAG_BUFFER_BASE(tu_image_view_ubwc_base_ref(iview)),
- A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(tu_image_view_ubwc_pitches(iview)));
+ tu_cs_emit_pkt4(cs, REG_A6XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3);
+ tu_cs_image_flag_ref(cs, iview, 0);
tu_cs_emit_regs(cs,
A6XX_GRAS_LRZ_BUFFER_BASE(0),
A6XX_GRAS_LRZ_BUFFER_PITCH(0),
A6XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE(0));
- tu_cs_emit_regs(cs,
- A6XX_RB_STENCIL_INFO(0));
-
- /* enable zs? */
+ if (attachment->format == VK_FORMAT_S8_UINT) {
+ tu_cs_emit_pkt4(cs, REG_A6XX_RB_STENCIL_INFO, 6);
+ tu_cs_emit(cs, A6XX_RB_STENCIL_INFO(.separate_stencil = true).value);
+ tu_cs_image_ref(cs, iview, 0);
+ tu_cs_emit(cs, attachment->gmem_offset);
+ } else {
+ tu_cs_emit_regs(cs,
+ A6XX_RB_STENCIL_INFO(0));
+ }
}
static void
struct tu_cs *cs)
{
const struct tu_framebuffer *fb = cmd->state.framebuffer;
- unsigned char mrt_comp[MAX_RTS] = { 0 };
- unsigned srgb_cntl = 0;
for (uint32_t i = 0; i < subpass->color_count; ++i) {
uint32_t a = subpass->color_attachments[i].attachment;
const struct tu_image_view *iview = fb->attachments[a].attachment;
- mrt_comp[i] = 0xf;
-
- if (vk_format_is_srgb(iview->vk_format))
- srgb_cntl |= (1 << i);
-
- struct tu_native_format format =
- tu6_format_image(iview->image, iview->vk_format, iview->base_mip);
+ tu_cs_emit_pkt4(cs, REG_A6XX_RB_MRT_BUF_INFO(i), 6);
+ tu_cs_emit(cs, iview->RB_MRT_BUF_INFO);
+ tu_cs_image_ref(cs, iview, 0);
+ tu_cs_emit(cs, cmd->state.pass->attachments[a].gmem_offset);
tu_cs_emit_regs(cs,
- A6XX_RB_MRT_BUF_INFO(i,
- .color_tile_mode = format.tile_mode,
- .color_format = format.fmt,
- .color_swap = format.swap),
- A6XX_RB_MRT_PITCH(i, tu_image_stride(iview->image, iview->base_mip)),
- A6XX_RB_MRT_ARRAY_PITCH(i, iview->image->layout.layer_size),
- A6XX_RB_MRT_BASE(i, tu_image_view_base_ref(iview)),
- A6XX_RB_MRT_BASE_GMEM(i, cmd->state.pass->attachments[a].gmem_offset));
+ A6XX_SP_FS_MRT_REG(i, .dword = iview->SP_FS_MRT_REG));
- tu_cs_emit_regs(cs,
- A6XX_SP_FS_MRT_REG(i,
- .color_format = format.fmt,
- .color_sint = vk_format_is_sint(iview->vk_format),
- .color_uint = vk_format_is_uint(iview->vk_format)));
-
- tu_cs_emit_regs(cs,
- A6XX_RB_MRT_FLAG_BUFFER_ADDR(i, tu_image_view_ubwc_base_ref(iview)),
- A6XX_RB_MRT_FLAG_BUFFER_PITCH(i, tu_image_view_ubwc_pitches(iview)));
+ tu_cs_emit_pkt4(cs, REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_LO(i), 3);
+ tu_cs_image_flag_ref(cs, iview, 0);
}
tu_cs_emit_regs(cs,
- A6XX_RB_SRGB_CNTL(.dword = srgb_cntl));
-
- tu_cs_emit_regs(cs,
- A6XX_SP_SRGB_CNTL(.dword = srgb_cntl));
-
+ A6XX_RB_SRGB_CNTL(.dword = subpass->srgb_cntl));
tu_cs_emit_regs(cs,
- A6XX_RB_RENDER_COMPONENTS(
- .rt0 = mrt_comp[0],
- .rt1 = mrt_comp[1],
- .rt2 = mrt_comp[2],
- .rt3 = mrt_comp[3],
- .rt4 = mrt_comp[4],
- .rt5 = mrt_comp[5],
- .rt6 = mrt_comp[6],
- .rt7 = mrt_comp[7]));
+ A6XX_SP_SRGB_CNTL(.dword = subpass->srgb_cntl));
tu_cs_emit_regs(cs,
- A6XX_SP_FS_RENDER_COMPONENTS(
- .rt0 = mrt_comp[0],
- .rt1 = mrt_comp[1],
- .rt2 = mrt_comp[2],
- .rt3 = mrt_comp[3],
- .rt4 = mrt_comp[4],
- .rt5 = mrt_comp[5],
- .rt6 = mrt_comp[6],
- .rt7 = mrt_comp[7]));
-
- // XXX: We probably can't hardcode LAYER_CNTL_TYPE.
+ A6XX_RB_RENDER_COMPONENTS(.dword = subpass->render_components));
tu_cs_emit_regs(cs,
- A6XX_GRAS_LAYER_CNTL(.layered = fb->layers > 1,
- .type = LAYER_2D_ARRAY));
+ A6XX_SP_FS_RENDER_COMPONENTS(.dword = subpass->render_components));
+
+ tu_cs_emit_regs(cs, A6XX_GRAS_MAX_LAYER_INDEX(fb->layers - 1));
}
void
continue;
const struct tu_image_view *iview = fb->attachments[a].attachment;
- if (iview->image->layout.ubwc_layer_size != 0)
+ if (iview->ubwc_enabled)
mrts_ubwc_enable |= 1 << i;
}
const uint32_t a = subpass->depth_stencil_attachment.attachment;
if (a != VK_ATTACHMENT_UNUSED) {
const struct tu_image_view *iview = fb->attachments[a].attachment;
- if (iview->image->layout.ubwc_layer_size != 0)
+ if (iview->ubwc_enabled)
cntl |= A6XX_RB_RENDER_CNTL_FLAG_DEPTH;
}
tu_cs_emit_pkt7(cs, CP_SET_MODE, 1);
tu_cs_emit(cs, 0x0);
-
- tu_cs_emit_regs(cs,
- A6XX_RB_UNKNOWN_8804(0));
-
- tu_cs_emit_regs(cs,
- A6XX_SP_TP_UNKNOWN_B304(0));
-
- tu_cs_emit_regs(cs,
- A6XX_GRAS_UNKNOWN_80A4(0));
} else {
tu_cs_emit_pkt7(cs, CP_SET_VISIBILITY_OVERRIDE, 1);
tu_cs_emit(cs, 0x1);
tu_cs_emit_pkt7(cs, CP_SET_MARKER, 1);
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_RESOLVE));
- /* blit scissor may have been changed by CmdClearAttachments */
- tu6_emit_blit_scissor(cmd, cs, false);
+ tu6_emit_blit_scissor(cmd, cs, true);
for (uint32_t a = 0; a < pass->attachment_count; ++a) {
if (pass->attachments[a].gmem_offset >= 0)
tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9981, 0x3);
tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9E72, 0);
tu_cs_emit_write_reg(cs, REG_A6XX_VPC_UNKNOWN_9108, 0x3);
- tu_cs_emit_write_reg(cs, REG_A6XX_SP_TP_UNKNOWN_B304, 0);
tu_cs_emit_write_reg(cs, REG_A6XX_SP_TP_UNKNOWN_B309, 0x000000a2);
- tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8804, 0);
- tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80A4, 0);
- tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80A5, 0);
- tu_cs_emit_write_reg(cs, REG_A6XX_GRAS_UNKNOWN_80A6, 0);
- tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8805, 0);
- tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8806, 0);
tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8878, 0);
tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8879, 0);
tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_CONTROL_5_REG, 0xfc);
tu6_emit_blit_scissor(cmd, cs, true);
for (uint32_t i = 0; i < cmd->state.pass->attachment_count; ++i)
- tu_load_gmem_attachment(cmd, cs, i);
+ tu_load_gmem_attachment(cmd, cs, i, false);
tu6_emit_blit_scissor(cmd, cs, false);
cmd->state.dirty |= TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
}
+void
+tu_CmdSetSampleLocationsEXT(VkCommandBuffer commandBuffer,
+ const VkSampleLocationsInfoEXT* pSampleLocationsInfo)
+{
+ TU_FROM_HANDLE(tu_cmd_buffer, cmd, commandBuffer);
+
+ tu6_emit_sample_locations(&cmd->draw_cs, pSampleLocationsInfo);
+}
+
void
tu_CmdExecuteCommands(VkCommandBuffer commandBuffer,
uint32_t commandBufferCount,
MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_DUMP);
}
- tu_cs_emit_call(&cmd->cs, &secondary->cs);
+ tu_cs_add_entries(&cmd->cs, &secondary->cs);
}
}
cmd->state.dirty = ~0u; /* TODO: set dirty only what needs to be */
tu_cond_exec_start(cs, CP_COND_EXEC_0_RENDER_MODE_GMEM);
if (subpass->resolve_attachments) {
+ tu6_emit_blit_scissor(cmd, cs, true);
+
for (unsigned i = 0; i < subpass->color_count; i++) {
uint32_t a = subpass->resolve_attachments[i].attachment;
if (a == VK_ATTACHMENT_UNUSED)
continue;
tu_store_gmem_attachment(cmd, cs, a,
- subpass->color_attachments[i].attachment);
+ subpass->color_attachments[i].attachment);
if (pass->attachments[a].gmem_offset < 0)
continue;
* if it is, should be doing a GMEM->GMEM resolve instead of GMEM->MEM->GMEM..
*/
tu_finishme("missing GMEM->GMEM resolve path\n");
- tu_emit_load_gmem_attachment(cmd, cs, a);
+ tu_load_gmem_attachment(cmd, cs, a, true);
}
}
TU_DRAW_STATE_DS,
TU_DRAW_STATE_BLEND,
TU_DRAW_STATE_VS_CONST,
+ TU_DRAW_STATE_GS_CONST,
TU_DRAW_STATE_FS_CONST,
TU_DRAW_STATE_DESC_SETS,
TU_DRAW_STATE_DESC_SETS_GMEM,
switch (type) {
case MESA_SHADER_VERTEX:
return SB6_VS_SHADER;
+ case MESA_SHADER_GEOMETRY:
+ return SB6_GS_SHADER;
case MESA_SHADER_FRAGMENT:
return SB6_FS_SHADER;
case MESA_SHADER_COMPUTE:
tu_cs_emit_regs(cs, A6XX_VPC_SO_BUFFER_SIZE(i, buf->size));
if (cmd->state.streamout_reset & (1 << i)) {
- offset *= tf->stride[i];
-
tu_cs_emit_regs(cs, A6XX_VPC_SO_BUFFER_OFFSET(i, offset));
cmd->state.streamout_reset &= ~(1 << i);
} else {
.enable_mask = ENABLE_ALL,
.ib = tu6_emit_consts(cmd, pipeline, descriptors_state, MESA_SHADER_VERTEX)
};
+ draw_state_groups[draw_state_group_count++] =
+ (struct tu_draw_state_group) {
+ .id = TU_DRAW_STATE_GS_CONST,
+ .enable_mask = ENABLE_ALL,
+ .ib = tu6_emit_consts(cmd, pipeline, descriptors_state, MESA_SHADER_GEOMETRY)
+ };
draw_state_groups[draw_state_group_count++] =
(struct tu_draw_state_group) {
.id = TU_DRAW_STATE_FS_CONST,