#include "tu_descriptor_set.h"
#include "tu_extensions.h"
+#include "tu_util.h"
/* Pre-declarations needed for WSI entrypoints */
struct wl_surface;
TU_DRAW_STATE_GS_CONST,
TU_DRAW_STATE_FS_CONST,
TU_DRAW_STATE_DESC_SETS,
- TU_DRAW_STATE_DESC_SETS_GMEM,
- TU_DRAW_STATE_DESC_SETS_SYSMEM,
TU_DRAW_STATE_DESC_SETS_LOAD,
TU_DRAW_STATE_VS_PARAMS,
+ TU_DRAW_STATE_INPUT_ATTACHMENTS_GMEM,
+ TU_DRAW_STATE_INPUT_ATTACHMENTS_SYSMEM,
/* dynamic state related draw states */
TU_DRAW_STATE_DYNAMIC,
struct tu_descriptor_state
{
struct tu_descriptor_set *sets[MAX_SETS];
- uint32_t valid;
- struct tu_push_descriptor_set push_set;
- bool push_dirty;
uint32_t dynamic_descriptors[MAX_DYNAMIC_BUFFERS * A6XX_TEX_CONST_DWORDS];
- uint32_t input_attachments[MAX_RTS * A6XX_TEX_CONST_DWORDS];
};
struct tu_tile
struct tu_draw_state dynamic_state[TU_DYNAMIC_STATE_COUNT];
struct tu_cs_entry vertex_buffers_ib;
struct tu_cs_entry shader_const_ib[MESA_SHADER_STAGES];
- struct tu_cs_entry desc_sets_ib, desc_sets_gmem_ib, desc_sets_sysmem_ib, desc_sets_load_ib;
+ struct tu_cs_entry desc_sets_ib, desc_sets_load_ib;
+ struct tu_cs_entry ia_gmem_ib, ia_sysmem_ib;
/* Stream output buffers */
struct
struct tu_bo bo;
};
-static inline gl_shader_stage
-vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
-{
- assert(__builtin_popcount(vk_stage) == 1);
- return ffs(vk_stage) - 1;
-}
-
-static inline VkShaderStageFlagBits
-mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
-{
- return (1 << mesa_stage);
-}
-
-#define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
-
-#define tu_foreach_stage(stage, stage_bits) \
- for (gl_shader_stage stage, \
- __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
- stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
-
-uint32_t
-tu6_stage2opcode(gl_shader_stage type);
-enum a6xx_state_block
-tu6_stage2shadersb(gl_shader_stage type);
-
struct tu_shader_module
{
unsigned char sha1[20];
struct ir3_shader *ir3_shader;
struct tu_push_constant_range push_consts;
- unsigned attachment_idx[MAX_RTS];
uint8_t active_desc_sets;
};
struct tu_program_descriptor_linkage
{
- struct ir3_ubo_analysis_state ubo_state;
struct ir3_const_state const_state;
uint32_t constlen;
struct tu_cs_entry binning_state_ib;
struct tu_program_descriptor_linkage link[MESA_SHADER_STAGES];
- unsigned input_attachment_idx[MAX_RTS];
} program;
struct
return tu6_format_color(format, TILE6_LINEAR).fmt;
}
-enum a6xx_depth_format tu6_pipe2depth(VkFormat format);
-
struct tu_image
{
VkImageType type;
: range->levelCount;
}
-enum a3xx_msaa_samples
-tu_msaa_samples(uint32_t samples);
-enum a6xx_tex_fetchsize
-tu6_fetchsize(VkFormat format);
-
struct tu_image_view
{
struct tu_image *image; /**< VkImageViewCreateInfo::image */
void
tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer);
-enum a6xx_tex_filter
-tu6_tex_filter(VkFilter filter, unsigned aniso);
-
VkResult
tu_image_create(VkDevice _device,
const VkImageCreateInfo *pCreateInfo,