#include "main/macros.h"
#include "util/list.h"
#include "util/macros.h"
+#include "util/u_atomic.h"
#include "vk_alloc.h"
#include "vk_debug_report.h"
#include "wsi_common.h"
uint32_t SP_UNKNOWN_A0F8;
} magic;
+ int msm_major_version;
+ int msm_minor_version;
+
/* This is the drivers on-disk cache used as a fallback as opposed to
* the pipeline cache defined by apps.
*/
void *map;
};
+/* This struct defines the layout of the global_bo */
+struct tu6_global
+{
+ /* 6 bcolor_entry entries, one for each VK_BORDER_COLOR */
+ uint8_t border_color[128 * 6];
+
+ uint32_t seqno_dummy; /* dummy seqno for CP_EVENT_WRITE */
+ uint32_t _pad0;
+ volatile uint32_t vsc_draw_overflow;
+ uint32_t _pad1;
+ volatile uint32_t vsc_prim_overflow;
+ uint32_t _pad2[3];
+
+ /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
+ struct {
+ uint32_t offset;
+ uint32_t pad[7];
+ } flush_base[4];
+};
+#define gb_offset(member) offsetof(struct tu6_global, member)
+#define global_iova(cmd, member) ((cmd)->device->global_bo.iova + gb_offset(member))
+
+/* extra space in vsc draw/prim streams */
+#define VSC_PAD 0x40
+
struct tu_device
{
VK_LOADER_DATA _loader_data;
int queue_count[TU_MAX_QUEUE_FAMILIES];
struct tu_physical_device *physical_device;
+ int _lost;
struct ir3_compiler *compiler;
/* Backup in-memory cache to be used if the app doesn't provide one */
struct tu_pipeline_cache *mem_cache;
- struct tu_bo vsc_draw_strm;
- struct tu_bo vsc_prim_strm;
- uint32_t vsc_draw_strm_pitch;
- uint32_t vsc_prim_strm_pitch;
-
#define MIN_SCRATCH_BO_SIZE_LOG2 12 /* A page */
/* Currently the kernel driver uses a 32-bit GPU address space, but it
bool initialized;
} scratch_bos[48 - MIN_SCRATCH_BO_SIZE_LOG2];
- struct tu_bo border_color;
+ struct tu_bo global_bo;
struct tu_device_extension_table enabled_extensions;
+
+ uint32_t vsc_draw_strm_pitch;
+ uint32_t vsc_prim_strm_pitch;
+ mtx_t vsc_pitch_mtx;
};
+VkResult _tu_device_set_lost(struct tu_device *device,
+ const char *file, int line,
+ const char *msg, ...) PRINTFLIKE(4, 5);
+#define tu_device_set_lost(dev, ...) \
+ _tu_device_set_lost(dev, __FILE__, __LINE__, __VA_ARGS__)
+
+static inline bool
+tu_device_is_lost(struct tu_device *device)
+{
+ return unlikely(p_atomic_read(&device->_lost));
+}
+
VkResult
tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
VkResult
uint32_t dynamic_descriptors[MAX_DYNAMIC_BUFFERS * A6XX_TEX_CONST_DWORDS];
};
-struct tu_tile
-{
- uint8_t pipe;
- uint8_t slot;
- VkOffset2D begin;
- VkOffset2D end;
-};
-
-struct tu_tiling_config
-{
- VkRect2D render_area;
-
- /* position and size of the first tile */
- VkRect2D tile0;
- /* number of tiles */
- VkExtent2D tile_count;
-
- /* size of the first VSC pipe */
- VkExtent2D pipe0;
- /* number of VSC pipes */
- VkExtent2D pipe_count;
-
- /* pipe register values */
- uint32_t pipe_config[MAX_VSC_PIPES];
- uint32_t pipe_sizes[MAX_VSC_PIPES];
-
- /* Whether sysmem rendering must be used */
- bool force_sysmem;
-};
-
enum tu_cmd_dirty_bits
{
TU_CMD_DIRTY_COMPUTE_PIPELINE = 1 << 1,
struct tu_cs_entry desc_sets_ib, desc_sets_load_ib;
struct tu_cs_entry ia_gmem_ib, ia_sysmem_ib;
+ struct tu_draw_state vs_params;
+
/* Index buffer */
uint64_t index_va;
uint32_t max_index_count;
- uint8_t index_size, index_shift;
+ uint8_t index_size;
/* because streamout base has to be 32-byte aligned
* there is an extra offset to deal with when it is
const struct tu_render_pass *pass;
const struct tu_subpass *subpass;
const struct tu_framebuffer *framebuffer;
-
- struct tu_tiling_config tiling_config;
+ VkRect2D render_area;
struct tu_cs_entry tile_store_ib;
VkResult
tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
-/* This struct defines the layout of the scratch_bo */
-struct tu6_control
-{
- uint32_t seqno_dummy; /* dummy seqno for CP_EVENT_WRITE */
- uint32_t _pad0;
- volatile uint32_t vsc_overflow;
- uint32_t _pad1;
- /* flag set from cmdstream when VSC overflow detected: */
- uint32_t vsc_scratch;
- uint32_t _pad2;
- uint32_t _pad3;
- uint32_t _pad4;
-
- /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
- struct {
- uint32_t offset;
- uint32_t pad[7];
- } flush_base[4];
-};
-
-#define ctrl_offset(member) offsetof(struct tu6_control, member)
-
struct tu_cmd_buffer
{
VK_LOADER_DATA _loader_data;
struct tu_cs draw_epilogue_cs;
struct tu_cs sub_cs;
- struct tu_bo scratch_bo;
-
bool has_tess;
- struct tu_bo vsc_draw_strm;
- struct tu_bo vsc_prim_strm;
uint32_t vsc_draw_strm_pitch;
uint32_t vsc_prim_strm_pitch;
- bool use_vsc_data;
};
/* Temporary struct for tracking a register state to be written, used by
struct
{
uint32_t patch_type;
- uint32_t per_vertex_output_size;
- uint32_t per_patch_output_size;
+ uint32_t param_stride;
uint32_t hs_bo_regid;
uint32_t ds_bo_regid;
bool upper_left_domain_origin;
uint32_t layer_count;
VkSampleCountFlagBits samples;
- struct fdl_layout layout;
+ struct fdl_layout layout[3];
+ uint32_t total_size;
unsigned queue_family_mask;
bool exclusive;
uint32_t height;
uint32_t layers;
+ /* size of the first tile */
+ VkExtent2D tile0;
+ /* number of tiles */
+ VkExtent2D tile_count;
+
+ /* size of the first VSC pipe */
+ VkExtent2D pipe0;
+ /* number of VSC pipes */
+ VkExtent2D pipe_count;
+
+ /* pipe register values */
+ uint32_t pipe_config[MAX_VSC_PIPES];
+ uint32_t pipe_sizes[MAX_VSC_PIPES];
+
uint32_t attachment_count;
struct tu_attachment_info attachments[0];
};
+void
+tu_framebuffer_tiling_config(struct tu_framebuffer *fb,
+ const struct tu_device *device,
+ const struct tu_render_pass *pass);
+
struct tu_subpass_barrier {
VkPipelineStageFlags src_stage_mask;
VkAccessFlags src_access_mask;
struct tu_bo bo;
};
+enum tu_semaphore_kind
+{
+ TU_SEMAPHORE_NONE,
+ TU_SEMAPHORE_SYNCOBJ,
+};
+
+struct tu_semaphore_part
+{
+ enum tu_semaphore_kind kind;
+ union {
+ uint32_t syncobj;
+ };
+};
+
struct tu_semaphore
{
- uint32_t syncobj;
- uint32_t temp_syncobj;
+ struct tu_semaphore_part permanent;
+ struct tu_semaphore_part temporary;
};
void
projects / mesa.git / blobdiff