#include <valgrind.h>
#define VG(x) x
#else
-#define VG(x)
+#define VG(x) ((void)0)
#endif
#include "c11/threads.h"
-#include "compiler/shader_enums.h"
#include "main/macros.h"
#include "util/list.h"
#include "util/macros.h"
#include "adreno_common.xml.h"
#include "adreno_pm4.xml.h"
#include "a6xx.xml.h"
+#include "fdl/freedreno_layout.h"
#include "tu_descriptor_set.h"
#include "tu_extensions.h"
#define NUM_META_FS_KEYS 13
#define TU_MAX_DRM_DEVICES 8
#define MAX_VIEWS 8
+/* The Qualcomm driver exposes 0x20000058 */
+#define MAX_STORAGE_BUFFER_RANGE 0x20000000
+/* TODO: this isn't a hardware limit, but for a high # of attachments
+ * we are missing logic to avoid having them all in GMEM at the same time
+ */
+#define MAX_ATTACHMENTS 64
#define NUM_DEPTH_CLEAR_PIPELINES 3
TU_DEBUG_STARTUP = 1 << 0,
TU_DEBUG_NIR = 1 << 1,
TU_DEBUG_IR3 = 1 << 2,
+ TU_DEBUG_NOBIN = 1 << 3,
};
struct tu_instance
struct tu_fence
{
+ struct wsi_fence *fence_wsi;
bool signaled;
int fd;
};
uint32_t offset;
};
+struct ts_cs_memory {
+ uint32_t *map;
+ uint64_t iova;
+};
+
enum tu_cs_mode
{
VkDeviceSize bo_offset;
};
+static inline uint64_t
+tu_buffer_iova(struct tu_buffer *buffer)
+{
+ return buffer->bo->iova + buffer->bo_offset;
+}
+
enum tu_dynamic_state_bits
{
TU_DYNAMIC_VIEWPORT = 1 << 0,
const char *
tu_get_perftest_option_name(int id);
-/**
- * Attachment state when recording a renderpass instance.
- *
- * The clear value is valid only if there exists a pending clear.
- */
-struct tu_attachment_state
-{
- VkImageAspectFlags pending_clear_aspects;
- uint32_t cleared_views;
- VkClearValue clear_value;
- VkImageLayout current_layout;
-};
-
struct tu_descriptor_state
{
struct tu_descriptor_set *sets[MAX_SETS];
uint32_t valid;
struct tu_push_descriptor_set push_set;
bool push_dirty;
- uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
+ uint64_t dynamic_buffers[MAX_DYNAMIC_BUFFERS];
};
struct tu_tile
struct tu_tiling_config
{
VkRect2D render_area;
- uint32_t buffer_cpp[MAX_RTS + 2];
+ uint32_t buffer_cpp[MAX_ATTACHMENTS];
uint32_t buffer_count;
/* position and size of the first tile */
/* number of tiles */
VkExtent2D tile_count;
- uint32_t gmem_offsets[MAX_RTS + 2];
+ uint32_t gmem_offsets[MAX_ATTACHMENTS];
/* size of the first VSC pipe */
VkExtent2D pipe0;
enum tu_cmd_dirty_bits
{
TU_CMD_DIRTY_PIPELINE = 1 << 0,
- TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 1,
+ TU_CMD_DIRTY_COMPUTE_PIPELINE = 1 << 1,
+ TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 2,
+ TU_CMD_DIRTY_DESCRIPTOR_SETS = 1 << 3,
+ TU_CMD_DIRTY_PUSH_CONSTANTS = 1 << 4,
TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16,
TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17,
uint32_t dirty;
struct tu_pipeline *pipeline;
+ struct tu_pipeline *compute_pipeline;
/* Vertex buffers */
struct
const struct tu_render_pass *pass;
const struct tu_subpass *subpass;
const struct tu_framebuffer *framebuffer;
- struct tu_attachment_state *attachments;
struct tu_tiling_config tiling_config;
struct tu_vertex_binding vertex_bindings[MAX_VBS];
uint32_t queue_family_index;
- uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
+ uint32_t push_constants[MAX_PUSH_CONSTANTS_SIZE / 4];
VkShaderStageFlags push_constant_stages;
struct tu_descriptor_set meta_push_descriptors;
struct tu_bo_list bo_list;
struct tu_cs cs;
struct tu_cs draw_cs;
+ struct tu_cs draw_state;
struct tu_cs tile_cs;
uint16_t marker_reg;
struct tu_bo scratch_bo;
uint32_t scratch_seqno;
+#define VSC_OVERFLOW 0x8
+#define VSC_SCRATCH 0x10
+
+ struct tu_bo vsc_data;
+ struct tu_bo vsc_data2;
+ uint32_t vsc_data_pitch;
+ uint32_t vsc_data2_pitch;
+ bool use_vsc_data;
bool wait_for_idle;
};
-void
+unsigned
tu6_emit_event_write(struct tu_cmd_buffer *cmd,
struct tu_cs *cs,
enum vgt_event_type event,
struct tu_device_memory *memory,
int *pFD);
+static inline struct tu_descriptor_state *
+tu_get_descriptors_state(struct tu_cmd_buffer *cmd_buffer,
+ VkPipelineBindPoint bind_point)
+{
+ return &cmd_buffer->descriptors[bind_point];
+}
+
/*
* Takes x,y,z as exact numbers of invocations, instead of blocks.
*
struct tu_event
{
- uint64_t *map;
+ struct tu_bo bo;
};
struct tu_shader_module;
struct tu_descriptor_map
{
+ /* TODO: avoid fixed size array/justify the size */
unsigned num;
- int set[32];
- int binding[32];
+ int set[64];
+ int binding[64];
+ int value[64];
};
struct tu_shader
struct tu_descriptor_map texture_map;
struct tu_descriptor_map sampler_map;
struct tu_descriptor_map ubo_map;
+ struct tu_descriptor_map ssbo_map;
/* This may be true for vertex shaders. When true, variants[1] is the
* binning variant and binning_binary is non-NULL.
const struct tu_shader_compile_options *options,
const VkAllocationCallbacks *alloc);
+struct tu_program_descriptor_linkage
+{
+ struct ir3_ubo_analysis_state ubo_state;
+ struct ir3_const_state const_state;
+
+ uint32_t constlen;
+
+ struct tu_descriptor_map texture_map;
+ struct tu_descriptor_map sampler_map;
+ struct tu_descriptor_map ubo_map;
+ struct tu_descriptor_map ssbo_map;
+ struct ir3_ibo_mapping image_mapping;
+};
+
struct tu_pipeline
{
struct tu_cs cs;
struct tu_bo binary_bo;
struct tu_cs_entry state_ib;
struct tu_cs_entry binning_state_ib;
+
+ struct tu_program_descriptor_linkage link[MESA_SHADER_STAGES];
} program;
struct
{
struct tu_cs_entry state_ib;
} blend;
+
+ struct
+ {
+ uint32_t local_size[3];
+ } compute;
};
void
const struct tu_native_format *
tu6_get_native_format(VkFormat format);
-int
+void
tu_pack_clear_value(const VkClearValue *val,
VkFormat format,
uint32_t buf[4]);
+
+void
+tu_2d_clear_color(const VkClearColorValue *val, VkFormat format, uint32_t buf[4]);
+
+void
+tu_2d_clear_zs(const VkClearDepthStencilValue *val, VkFormat format, uint32_t buf[4]);
+
enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
+enum a6xx_depth_format tu6_pipe2depth(VkFormat format);
struct tu_image_level
{
VkExtent3D extent;
uint32_t level_count;
uint32_t layer_count;
+ VkSampleCountFlagBits samples;
+
- VkDeviceSize size;
uint32_t alignment;
- /* memory layout */
- VkDeviceSize layer_size;
- struct tu_image_level levels[15];
- unsigned tile_mode;
+ struct fdl_layout layout;
unsigned queue_family_mask;
bool exclusive;
: range->levelCount;
}
+static inline VkDeviceSize
+tu_layer_size(struct tu_image *image, int level)
+{
+ return fdl_layer_stride(&image->layout, level);
+}
+
+static inline uint32_t
+tu_image_stride(struct tu_image *image, int level)
+{
+ return image->layout.slices[level].pitch * image->layout.cpp;
+}
+
+static inline uint64_t
+tu_image_base(struct tu_image *image, int level, int layer)
+{
+ return image->bo->iova + image->bo_offset +
+ fdl_surface_offset(&image->layout, level, layer);
+}
+
+static inline VkDeviceSize
+tu_image_ubwc_size(struct tu_image *image, int level)
+{
+ return image->layout.ubwc_size;
+}
+
+static inline uint32_t
+tu_image_ubwc_pitch(struct tu_image *image, int level)
+{
+ return image->layout.ubwc_slices[level].pitch;
+}
+
+static inline uint64_t
+tu_image_ubwc_base(struct tu_image *image, int level, int layer)
+{
+ return image->bo->iova + image->bo_offset +
+ image->layout.ubwc_slices[level].offset +
+ layer * tu_image_ubwc_size(image, level);
+}
+
+enum a6xx_tile_mode
+tu6_get_image_tile_mode(struct tu_image *image, int level);
+enum a3xx_msaa_samples
+tu_msaa_samples(uint32_t samples);
+
struct tu_image_view
{
struct tu_image *image; /**< VkImageViewCreateInfo::image */
uint32_t state[A6XX_TEX_SAMP_DWORDS];
bool needs_border;
-};
-
-struct tu_image_create_info
-{
- const VkImageCreateInfo *vk_info;
- bool scanout;
- bool no_metadata_planes;
+ VkBorderColor border;
};
VkResult
tu_image_create(VkDevice _device,
- const struct tu_image_create_info *info,
+ const VkImageCreateInfo *pCreateInfo,
const VkAllocationCallbacks *alloc,
- VkImage *pImage);
+ VkImage *pImage,
+ uint64_t modifier);
VkResult
tu_image_from_gralloc(VkDevice device_h,
struct tu_attachment_info attachments[0];
};
-struct tu_subpass_barrier
-{
- VkPipelineStageFlags src_stage_mask;
- VkAccessFlags src_access_mask;
- VkAccessFlags dst_access_mask;
-};
-
-void
-tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
- const struct tu_subpass_barrier *barrier);
-
struct tu_subpass_attachment
{
uint32_t attachment;
- VkImageLayout layout;
};
struct tu_subpass
struct tu_subpass_attachment *resolve_attachments;
struct tu_subpass_attachment depth_stencil_attachment;
- /** Subpass has at least one resolve attachment */
- bool has_resolve;
-
- struct tu_subpass_barrier start_barrier;
-
- uint32_t view_mask;
- VkSampleCountFlagBits max_sample_count;
+ VkSampleCountFlagBits samples;
};
struct tu_render_pass_attachment
{
VkFormat format;
- uint32_t samples;
+ uint32_t cpp;
VkAttachmentLoadOp load_op;
VkAttachmentLoadOp stencil_load_op;
- VkImageLayout initial_layout;
- VkImageLayout final_layout;
- uint32_t view_mask;
+ VkAttachmentStoreOp store_op;
+ VkAttachmentStoreOp stencil_store_op;
+ bool needs_gmem;
};
struct tu_render_pass
uint32_t subpass_count;
struct tu_subpass_attachment *subpass_attachments;
struct tu_render_pass_attachment *attachments;
- struct tu_subpass_barrier end_barrier;
struct tu_subpass subpasses[0];
};
projects / mesa.git / blobdiff