Merge commit 'origin/gallium-draw-retval'

[mesa.git] / src / gallium / auxiliary / gallivm / tgsitollvm.cpp

diff --git a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
index c11b88af9ec601ae9a1d87a3a7b1e421ff031e87..8f7d3b71004b1793f9d06d3fc07b3d43aab88844 100644 (file)
--- a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
+++ b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
@@ -25,7 +25,7 @@
 #include <llvm/ModuleProvider.h>
 #include <llvm/Pass.h>
 #include <llvm/PassManager.h>
-#include <llvm/ParameterAttributes.h>
+#include <llvm/Attributes.h>
 #include <llvm/Support/PatternMatch.h>
 #include <llvm/ExecutionEngine/JIT.h>
 #include <llvm/ExecutionEngine/Interpreter.h>
@@ -94,8 +94,8 @@ translate_declaration(struct gallivm_ir *prog,
       unsigned first, last, mask;
       uint interp_method;
 
-      first = decl->DeclarationRange.First;
-      last = decl->DeclarationRange.Last;
+      first = decl->Range.First;
+      last = decl->Range.Last;
       mask = decl->Declaration.UsageMask;
 
       /* Do not touch WPOS.xy */
@@ -149,7 +149,7 @@ translate_declarationir(struct gallivm_ir *,
                       struct tgsi_full_declaration *)
 {
    if (decl->Declaration.File == TGSI_FILE_ADDRESS) {
-      int idx = decl->DeclarationRange.First;
+      int idx = decl->Range.First;
       storage->addAddress(idx);
    }
 }
@@ -160,10 +160,11 @@ translate_immediate(Storage *storage,
 {
    float vec[4];
    int i;
-   for (i = 0; i < imm->Immediate.Size - 1; ++i) {
+   assert( imm->Immediate.NrTokens <= 4 + 1 );
+   for (i = 0; i < imm->Immediate.NrTokens - 1; ++i) {
       switch (imm->Immediate.DataType) {
       case TGSI_IMM_FLOAT32:
-         vec[i] = imm->u.ImmediateFloat32[i].Float;
+         vec[i] = imm->u[i].Float;
          break;
       default:
          assert(0);
@@ -179,10 +180,11 @@ translate_immediateir(StorageSoa *storage,
 {
    float vec[4];
    int i;
-   for (i = 0; i < imm->Immediate.Size - 1; ++i) {
+   assert( imm->Immediate.NrTokens <= 4 + 1 );
+   for (i = 0; i < imm->Immediate.NrTokens - 1; ++i) {
       switch (imm->Immediate.DataType) {
       case TGSI_IMM_FLOAT32:
-         vec[i] = imm->u.ImmediateFloat32[i].Float;
+         vec[i] = imm->u[i].Float;
          break;
       default:
          assert(0);
@@ -232,26 +234,26 @@ translate_instruction(llvm::Module *module,
    inputs[3] = 0;
 
    for (int i = 0; i < inst->Instruction.NumSrcRegs; ++i) {
-      struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i];
+      struct tgsi_full_src_register *src = &inst->Src[i];
       llvm::Value *val = 0;
       llvm::Value *indIdx = 0;
 
-      if (src->SrcRegister.Indirect) {
-         indIdx = storage->addrElement(src->SrcRegisterInd.Index);
+      if (src->Register.Indirect) {
+         indIdx = storage->addrElement(src->Indirect.Index);
          indIdx = storage->extractIndex(indIdx);
       }
-      if (src->SrcRegister.File == TGSI_FILE_CONSTANT) {
-         val = storage->constElement(src->SrcRegister.Index, indIdx);
-      } else if (src->SrcRegister.File == TGSI_FILE_INPUT) {
-         val = storage->inputElement(src->SrcRegister.Index, indIdx);
-      } else if (src->SrcRegister.File == TGSI_FILE_TEMPORARY) {
-         val = storage->tempElement(src->SrcRegister.Index);
-      } else if (src->SrcRegister.File == TGSI_FILE_OUTPUT) {
-         val = storage->outputElement(src->SrcRegister.Index, indIdx);
-      } else if (src->SrcRegister.File == TGSI_FILE_IMMEDIATE) {
-         val = storage->immediateElement(src->SrcRegister.Index);
+      if (src->Register.File == TGSI_FILE_CONSTANT) {
+         val = storage->constElement(src->Register.Index, indIdx);
+      } else if (src->Register.File == TGSI_FILE_INPUT) {
+         val = storage->inputElement(src->Register.Index, indIdx);
+      } else if (src->Register.File == TGSI_FILE_TEMPORARY) {
+         val = storage->tempElement(src->Register.Index);
+      } else if (src->Register.File == TGSI_FILE_OUTPUT) {
+         val = storage->outputElement(src->Register.Index, indIdx);
+      } else if (src->Register.File == TGSI_FILE_IMMEDIATE) {
+         val = storage->immediateElement(src->Register.Index);
       } else {
-         fprintf(stderr, "ERROR: not supported llvm source %d\n", src->SrcRegister.File);
+         fprintf(stderr, "ERROR: not supported llvm source %d\n", src->Register.File);
          return;
       }
 
@@ -336,7 +338,7 @@ translate_instruction(llvm::Module *module,
       out = instr->sub(inputs[0], inputs[1]);
    }
       break;
-   case TGSI_OPCODE_LERP: {
+   case TGSI_OPCODE_LRP: {
       out = instr->lerp(inputs[0], inputs[1], inputs[2]);
    }
       break;
@@ -348,17 +350,11 @@ translate_instruction(llvm::Module *module,
       out = instr->cnd0(inputs[0], inputs[1], inputs[2]);
    }
       break;
-   case TGSI_OPCODE_DOT2ADD: {
+   case TGSI_OPCODE_DP2A: {
       out = instr->dot2add(inputs[0], inputs[1], inputs[2]);
    }
       break;
-   case TGSI_OPCODE_INDEX:
-      break;
-   case TGSI_OPCODE_NEGATE: {
-      out = instr->neg(inputs[0]);
-   }
-      break;
-   case TGSI_OPCODE_FRAC: {
+   case TGSI_OPCODE_FRC: {
       out = instr->frc(inputs[0]);
    }
       break;
@@ -366,30 +362,28 @@ translate_instruction(llvm::Module *module,
       out = instr->clamp(inputs[0]);
    }
       break;
-   case TGSI_OPCODE_FLOOR: {
+   case TGSI_OPCODE_FLR: {
       out = instr->floor(inputs[0]);
    }
       break;
    case TGSI_OPCODE_ROUND:
       break;
-   case TGSI_OPCODE_EXPBASE2: {
+   case TGSI_OPCODE_EX2: {
       out = instr->ex2(inputs[0]);
    }
       break;
-   case TGSI_OPCODE_LOGBASE2: {
+   case TGSI_OPCODE_LG2: {
       out = instr->lg2(inputs[0]);
    }
       break;
-   case TGSI_OPCODE_POWER: {
+   case TGSI_OPCODE_POW: {
       out = instr->pow(inputs[0], inputs[1]);
    }
       break;
-   case TGSI_OPCODE_CROSSPRODUCT: {
+   case TGSI_OPCODE_XPD: {
       out = instr->cross(inputs[0], inputs[1]);
    }
       break;
-   case TGSI_OPCODE_MULTIPLYMATRIX:
-      break;
    case TGSI_OPCODE_ABS: {
       out = instr->abs(inputs[0]);
    }
@@ -522,7 +516,7 @@ translate_instruction(llvm::Module *module,
       return;  //just update the state
    }
       break;
-   case TGSI_OPCODE_LOOP:
+   case TGSI_OPCODE_BGNFOR:
       break;
    case TGSI_OPCODE_REP:
       break;
@@ -538,7 +532,7 @@ translate_instruction(llvm::Module *module,
       return; //just update the state
    }
       break;
-   case TGSI_OPCODE_ENDLOOP:
+   case TGSI_OPCODE_ENDFOR:
       break;
    case TGSI_OPCODE_ENDREP:
       break;
@@ -558,7 +552,7 @@ translate_instruction(llvm::Module *module,
       break;
    case TGSI_OPCODE_SHL:
       break;
-   case TGSI_OPCODE_SHR:
+   case TGSI_OPCODE_ISHR:
       break;
    case TGSI_OPCODE_AND:
       break;
@@ -580,7 +574,7 @@ translate_instruction(llvm::Module *module,
       break;
    case TGSI_OPCODE_ENDPRIM:
       break;
-   case TGSI_OPCODE_BGNLOOP2: {
+   case TGSI_OPCODE_BGNLOOP: {
       instr->beginLoop();
       storage->setCurrentBlock(instr->currentBlock());
       return;
@@ -593,7 +587,7 @@ translate_instruction(llvm::Module *module,
       return;
    }
       break;
-   case TGSI_OPCODE_ENDLOOP2: {
+   case TGSI_OPCODE_ENDLOOP: {
       instr->endLoop();
       storage->setCurrentBlock(instr->currentBlock());
       return;
@@ -617,14 +611,6 @@ translate_instruction(llvm::Module *module,
       break;
    case TGSI_OPCODE_NOP:
       break;
-   case TGSI_OPCODE_M4X3:
-      break;
-   case TGSI_OPCODE_M3X4:
-      break;
-   case TGSI_OPCODE_M3X3:
-      break;
-   case TGSI_OPCODE_M3X2:
-      break;
    case TGSI_OPCODE_CALLNZ:
       break;
    case TGSI_OPCODE_IFC:
@@ -670,14 +656,14 @@ translate_instruction(llvm::Module *module,
 
    /* store results  */
    for (int i = 0; i < inst->Instruction.NumDstRegs; ++i) {
-      struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
-
-      if (dst->DstRegister.File == TGSI_FILE_OUTPUT) {
-         storage->setOutputElement(dst->DstRegister.Index, out, dst->DstRegister.WriteMask);
-      } else if (dst->DstRegister.File == TGSI_FILE_TEMPORARY) {
-         storage->setTempElement(dst->DstRegister.Index, out, dst->DstRegister.WriteMask);
-      } else if (dst->DstRegister.File == TGSI_FILE_ADDRESS) {
-         storage->setAddrElement(dst->DstRegister.Index, out, dst->DstRegister.WriteMask);
+      struct tgsi_full_dst_register *dst = &inst->Dst[i];
+
+      if (dst->Register.File == TGSI_FILE_OUTPUT) {
+         storage->setOutputElement(dst->Register.Index, out, dst->Register.WriteMask);
+      } else if (dst->Register.File == TGSI_FILE_TEMPORARY) {
+         storage->setTempElement(dst->Register.Index, out, dst->Register.WriteMask);
+      } else if (dst->Register.File == TGSI_FILE_ADDRESS) {
+         storage->setAddrElement(dst->Register.Index, out, dst->Register.WriteMask);
       } else {
          fprintf(stderr, "ERROR: unsupported LLVM destination!");
          assert(!"wrong destination");
@@ -697,16 +683,16 @@ translate_instructionir(llvm::Module *module,
    std::vector< std::vector<llvm::Value*> > inputs(inst->Instruction.NumSrcRegs);
 
    for (int i = 0; i < inst->Instruction.NumSrcRegs; ++i) {
-      struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i];
+      struct tgsi_full_src_register *src = &inst->Src[i];
       std::vector<llvm::Value*> val;
       llvm::Value *indIdx = 0;
       int swizzle = swizzleInt(src);
 
-      if (src->SrcRegister.Indirect) {
-         indIdx = storage->addrElement(src->SrcRegisterInd.Index);
+      if (src->Register.Indirect) {
+         indIdx = storage->addrElement(src->Indirect.Index);
       }
-      val = storage->load((enum tgsi_file_type)src->SrcRegister.File,
-                          src->SrcRegister.Index, swizzle, instr->getIRBuilder(), indIdx);
+      val = storage->load((enum tgsi_file_type)src->Register.File,
+                          src->Register.Index, swizzle, instr->getIRBuilder(), indIdx);
 
       inputs[i] = val;
    }
@@ -778,44 +764,38 @@ translate_instructionir(llvm::Module *module,
       out = instr->sub(inputs[0], inputs[1]);
    }
       break;
-   case TGSI_OPCODE_LERP: {
+   case TGSI_OPCODE_LRP: {
    }
       break;
    case TGSI_OPCODE_CND:
       break;
    case TGSI_OPCODE_CND0:
       break;
-   case TGSI_OPCODE_DOT2ADD:
+   case TGSI_OPCODE_DP2A:
       break;
-   case TGSI_OPCODE_INDEX:
-      break;
-   case TGSI_OPCODE_NEGATE:
-      break;
-   case TGSI_OPCODE_FRAC: {
+   case TGSI_OPCODE_FRC: {
    }
       break;
    case TGSI_OPCODE_CLAMP:
       break;
-   case TGSI_OPCODE_FLOOR: {
+   case TGSI_OPCODE_FLR: {
    }
       break;
    case TGSI_OPCODE_ROUND:
       break;
-   case TGSI_OPCODE_EXPBASE2: {
+   case TGSI_OPCODE_EX2: {
    }
       break;
-   case TGSI_OPCODE_LOGBASE2: {
+   case TGSI_OPCODE_LG2: {
    }
       break;
-   case TGSI_OPCODE_POWER: {
+   case TGSI_OPCODE_POW: {
       out = instr->pow(inputs[0], inputs[1]);
    }
       break;
-   case TGSI_OPCODE_CROSSPRODUCT: {
+   case TGSI_OPCODE_XPD: {
    }
       break;
-   case TGSI_OPCODE_MULTIPLYMATRIX:
-      break;
    case TGSI_OPCODE_ABS: {
       out = instr->abs(inputs[0]);
    }
@@ -910,7 +890,7 @@ translate_instructionir(llvm::Module *module,
    case TGSI_OPCODE_IF: {
    }
       break;
-   case TGSI_OPCODE_LOOP:
+   case TGSI_OPCODE_BGNFOR:
       break;
    case TGSI_OPCODE_REP:
       break;
@@ -920,7 +900,7 @@ translate_instructionir(llvm::Module *module,
    case TGSI_OPCODE_ENDIF: {
    }
       break;
-   case TGSI_OPCODE_ENDLOOP:
+   case TGSI_OPCODE_ENDFOR:
       break;
    case TGSI_OPCODE_ENDREP:
       break;
@@ -939,7 +919,7 @@ translate_instructionir(llvm::Module *module,
       break;
    case TGSI_OPCODE_SHL:
       break;
-   case TGSI_OPCODE_SHR:
+   case TGSI_OPCODE_ISHR:
       break;
    case TGSI_OPCODE_AND:
       break;
@@ -961,13 +941,13 @@ translate_instructionir(llvm::Module *module,
       break;
    case TGSI_OPCODE_ENDPRIM:
       break;
-   case TGSI_OPCODE_BGNLOOP2: {
+   case TGSI_OPCODE_BGNLOOP: {
    }
       break;
    case TGSI_OPCODE_BGNSUB: {
    }
       break;
-   case TGSI_OPCODE_ENDLOOP2: {
+   case TGSI_OPCODE_ENDLOOP: {
    }
       break;
    case TGSI_OPCODE_ENDSUB: {
@@ -983,14 +963,6 @@ translate_instructionir(llvm::Module *module,
       break;
    case TGSI_OPCODE_NOP:
       break;
-   case TGSI_OPCODE_M4X3:
-      break;
-   case TGSI_OPCODE_M3X4:
-      break;
-   case TGSI_OPCODE_M3X3:
-      break;
-   case TGSI_OPCODE_M3X2:
-      break;
    case TGSI_OPCODE_NRM4:
       break;
    case TGSI_OPCODE_CALLNZ:
@@ -1021,9 +993,9 @@ translate_instructionir(llvm::Module *module,
 
    /* store results  */
    for (int i = 0; i < inst->Instruction.NumDstRegs; ++i) {
-      struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
-      storage->store((enum tgsi_file_type)dst->DstRegister.File,
-                     dst->DstRegister.Index, out, dst->DstRegister.WriteMask,
+      struct tgsi_full_dst_register *dst = &inst->Dst[i];
+      storage->store((enum tgsi_file_type)dst->Register.File,
+                     dst->Register.Index, out, dst->Register.WriteMask,
                     instr->getIRBuilder() );
    }
 }