nir_variable *input_var_face;
nir_variable *input_var_position;
+ nir_variable *input_var_point;
/**
* Stack of nir_cursors where instructions should be pushed as we pop
bool cap_scalar;
bool cap_face_is_sysval;
bool cap_position_is_sysval;
+ bool cap_point_is_sysval;
bool cap_packed_uniforms;
bool cap_samplers_as_deref;
};
#define ttn_swizzle(b, src, x, y, z, w) \
- nir_swizzle(b, src, SWIZ(x, y, z, w), 4, false)
+ nir_swizzle(b, src, SWIZ(x, y, z, w), 4)
#define ttn_channel(b, src, swiz) \
- nir_swizzle(b, src, SWIZ(swiz, swiz, swiz, swiz), 1, false)
+ nir_channel(b, src, TGSI_SWIZZLE_##swiz)
static gl_varying_slot
tgsi_varying_semantic_to_slot(unsigned semantic, unsigned index)
}
}
+static enum gl_frag_depth_layout
+ttn_get_depth_layout(unsigned tgsi_fs_depth_layout)
+{
+ switch (tgsi_fs_depth_layout) {
+ case TGSI_FS_DEPTH_LAYOUT_NONE:
+ return FRAG_DEPTH_LAYOUT_NONE;
+ case TGSI_FS_DEPTH_LAYOUT_ANY:
+ return FRAG_DEPTH_LAYOUT_ANY;
+ case TGSI_FS_DEPTH_LAYOUT_GREATER:
+ return FRAG_DEPTH_LAYOUT_GREATER;
+ case TGSI_FS_DEPTH_LAYOUT_LESS:
+ return FRAG_DEPTH_LAYOUT_LESS;
+ case TGSI_FS_DEPTH_LAYOUT_UNCHANGED:
+ return FRAG_DEPTH_LAYOUT_UNCHANGED;
+ default:
+ unreachable("bad TGSI FS depth layout");
+ }
+}
+
static nir_ssa_def *
ttn_src_for_dest(nir_builder *b, nir_alu_dest *dest)
{
for (int i = 0; i < 4; i++)
src.swizzle[i] = i;
- return nir_fmov_alu(b, src, 4);
+ return nir_mov_alu(b, src, 4);
}
static enum glsl_interp_mode
var->data.location = VARYING_SLOT_POS;
}
c->input_var_position = var;
+ } else if (decl->Semantic.Name == TGSI_SEMANTIC_PCOORD) {
+ if (c->cap_point_is_sysval) {
+ var->data.mode = nir_var_system_value;
+ var->data.location = SYSTEM_VALUE_POINT_COORD;
+ } else {
+ var->data.location = VARYING_SLOT_PNTC;
+ }
+ c->input_var_point = var;
} else {
var->data.location =
tgsi_varying_semantic_to_slot(decl->Semantic.Name,
case TGSI_FILE_CONSTANT:
var->data.mode = nir_var_uniform;
var->name = ralloc_asprintf(var, "uniform_%d", idx);
+ var->data.location = idx;
exec_list_push_tail(&b->shader->uniforms, &var->node);
break;
c->imm_defs[c->next_imm] = &load_const->def;
c->next_imm++;
- for (i = 0; i < 4; i++)
- load_const->value.u32[i] = tgsi_imm->u[i].Uint;
+ for (i = 0; i < load_const->def.num_components; i++)
+ load_const->value[i].u32 = tgsi_imm->u[i].Uint;
nir_builder_instr_insert(b, &load_const->instr);
}
ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
struct tgsi_ind_register *indirect,
struct tgsi_dimension *dim,
- struct tgsi_ind_register *dimind)
+ struct tgsi_ind_register *dimind,
+ bool src_is_float)
{
nir_builder *b = &c->build;
nir_src src;
op = nir_intrinsic_load_frag_coord;
load = nir_load_frag_coord(b);
break;
+ case TGSI_SEMANTIC_PCOORD:
+ assert(c->cap_point_is_sysval);
+ op = nir_intrinsic_load_point_coord;
+ load = nir_load_point_coord(b);
+ break;
default:
unreachable("bad system value");
}
c->scan->input_semantic_name[index] == TGSI_SEMANTIC_POSITION) {
assert(!c->cap_position_is_sysval && c->input_var_position);
return nir_src_for_ssa(nir_load_var(&c->build, c->input_var_position));
+ } else if (c->scan->processor == PIPE_SHADER_FRAGMENT &&
+ c->scan->input_semantic_name[index] == TGSI_SEMANTIC_PCOORD) {
+ assert(!c->cap_point_is_sysval && c->input_var_point);
+ return nir_src_for_ssa(nir_load_var(&c->build, c->input_var_point));
} else {
/* Indirection on input arrays isn't supported by TTN. */
assert(!dim);
}
load = nir_intrinsic_instr_create(b->shader, op);
+ if (op == nir_intrinsic_load_uniform) {
+ nir_intrinsic_set_type(load, src_is_float ? nir_type_float :
+ nir_type_int);
+ }
load->num_components = 4;
if (dim && (dim->Index > 0 || dim->Indirect)) {
if (dimind) {
load->src[srcn] =
ttn_src_for_file_and_index(c, dimind->File, dimind->Index,
- NULL, NULL, NULL);
+ NULL, NULL, NULL, false);
} else {
/* UBOs start at index 1 in TGSI: */
load->src[srcn] =
src.src = ttn_src_for_file_and_index(c,
indirect->File,
indirect->Index,
- NULL, NULL, NULL);
- return nir_imov_alu(b, src, 1);
+ NULL, NULL, NULL,
+ false);
+ return nir_mov_alu(b, src, 1);
}
static nir_alu_dest
struct tgsi_src_register *tgsi_src = &tgsi_fsrc->Register;
enum tgsi_opcode opcode = c->token->FullInstruction.Instruction.Opcode;
unsigned tgsi_src_type = tgsi_opcode_infer_src_type(opcode, src_idx);
- bool src_is_float = !(tgsi_src_type == TGSI_TYPE_SIGNED ||
- tgsi_src_type == TGSI_TYPE_UNSIGNED);
+ bool src_is_float = (tgsi_src_type == TGSI_TYPE_FLOAT ||
+ tgsi_src_type == TGSI_TYPE_DOUBLE ||
+ tgsi_src_type == TGSI_TYPE_UNTYPED);
nir_alu_src src;
memset(&src, 0, sizeof(src));
src.src = ttn_src_for_file_and_index(c,
tgsi_src->File,
tgsi_src->Index,
- ind, dim, dimind);
+ ind, dim, dimind,
+ src_is_float);
}
src.swizzle[0] = tgsi_src->SwizzleX;
src.swizzle[2] = tgsi_src->SwizzleZ;
src.swizzle[3] = tgsi_src->SwizzleW;
- nir_ssa_def *def = nir_fmov_alu(b, src, 4);
+ nir_ssa_def *def = nir_mov_alu(b, src, 4);
+
+ if (tgsi_type_is_64bit(tgsi_src_type))
+ def = nir_bitcast_vector(b, def, 64);
if (tgsi_src->Absolute) {
if (src_is_float)
return def;
}
-static void
-ttn_alu(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
-{
- unsigned num_srcs = nir_op_infos[op].num_inputs;
- nir_alu_instr *instr = nir_alu_instr_create(b->shader, op);
- unsigned i;
-
- for (i = 0; i < num_srcs; i++)
- instr->src[i].src = nir_src_for_ssa(src[i]);
-
- instr->dest = dest;
- nir_builder_instr_insert(b, &instr->instr);
-}
-
static void
ttn_move_dest_masked(nir_builder *b, nir_alu_dest dest,
nir_ssa_def *def, unsigned write_mask)
if (!(dest.write_mask & write_mask))
return;
- nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
mov->dest = dest;
mov->dest.write_mask &= write_mask;
mov->src[0].src = nir_src_for_ssa(def);
ttn_move_dest_masked(b, dest, def, TGSI_WRITEMASK_XYZW);
}
+static void
+ttn_alu(nir_builder *b, nir_op op, nir_alu_dest dest, unsigned dest_bitsize,
+ nir_ssa_def **src)
+{
+ nir_ssa_def *def = nir_build_alu_src_arr(b, op, src);
+ if (def->bit_size == 1)
+ def = nir_ineg(b, nir_b2i(b, def, dest_bitsize));
+ assert(def->bit_size == dest_bitsize);
+ if (dest_bitsize == 64) {
+ if (def->num_components > 2) {
+ /* 32 -> 64 bit conversion ops are supposed to only convert the first
+ * two components, and we need to truncate here to avoid creating a
+ * vec8 after bitcasting the destination.
+ */
+ def = nir_channels(b, def, 0x3);
+ }
+ def = nir_bitcast_vector(b, def, 32);
+ }
+ ttn_move_dest(b, dest, def);
+}
+
static void
ttn_arl(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
{
{
ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_X);
ttn_move_dest_masked(b, dest, nir_fmul(b, src[0], src[1]), TGSI_WRITEMASK_Y);
- ttn_move_dest_masked(b, dest, nir_fmov(b, src[0]), TGSI_WRITEMASK_Z);
- ttn_move_dest_masked(b, dest, nir_fmov(b, src[1]), TGSI_WRITEMASK_W);
+ ttn_move_dest_masked(b, dest, nir_mov(b, src[0]), TGSI_WRITEMASK_Z);
+ ttn_move_dest_masked(b, dest, nir_mov(b, src[1]), TGSI_WRITEMASK_W);
}
/* LIT - Light Coefficients
instr->src[src_number].src =
nir_src_for_ssa(nir_swizzle(b, src[0], SWIZ(X, Y, Z, W),
- instr->coord_components, false));
+ instr->coord_components));
instr->src[src_number].src_type = nir_tex_src_coord;
src_number++;
instr->src[src_number].src_type = nir_tex_src_ddx;
instr->src[src_number].src =
nir_src_for_ssa(nir_swizzle(b, src[1], SWIZ(X, Y, Z, W),
- nir_tex_instr_src_size(instr, src_number),
- false));
+ nir_tex_instr_src_size(instr, src_number)));
src_number++;
instr->src[src_number].src_type = nir_tex_src_ddy;
instr->src[src_number].src =
nir_src_for_ssa(nir_swizzle(b, src[2], SWIZ(X, Y, Z, W),
- nir_tex_instr_src_size(instr, src_number),
- false));
+ nir_tex_instr_src_size(instr, src_number)));
src_number++;
}
src.src = ttn_src_for_file_and_index(c,
tex_offset->File,
tex_offset->Index,
- NULL, NULL, NULL);
+ NULL, NULL, NULL,
+ true);
src.swizzle[0] = tex_offset->SwizzleX;
src.swizzle[1] = tex_offset->SwizzleY;
instr->src[src_number].src_type = nir_tex_src_offset;
instr->src[src_number].src = nir_src_for_ssa(
- nir_fmov_alu(b, src, nir_tex_instr_src_size(instr, src_number)));
+ nir_mov_alu(b, src, nir_tex_instr_src_size(instr, src_number)));
src_number++;
}
static const nir_op op_trans[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_ARL] = 0,
- [TGSI_OPCODE_MOV] = nir_op_fmov,
+ [TGSI_OPCODE_MOV] = nir_op_mov,
[TGSI_OPCODE_LIT] = 0,
[TGSI_OPCODE_RCP] = nir_op_frcp,
[TGSI_OPCODE_RSQ] = nir_op_frsq,
[TGSI_OPCODE_ENDSUB] = 0, /* XXX: no function calls */
[TGSI_OPCODE_NOP] = 0,
- [TGSI_OPCODE_FSEQ] = nir_op_feq32,
- [TGSI_OPCODE_FSGE] = nir_op_fge32,
- [TGSI_OPCODE_FSLT] = nir_op_flt32,
- [TGSI_OPCODE_FSNE] = nir_op_fne32,
+ [TGSI_OPCODE_FSEQ] = nir_op_feq,
+ [TGSI_OPCODE_FSGE] = nir_op_fge,
+ [TGSI_OPCODE_FSLT] = nir_op_flt,
+ [TGSI_OPCODE_FSNE] = nir_op_fne,
[TGSI_OPCODE_KILL_IF] = 0,
[TGSI_OPCODE_IMAX] = nir_op_imax,
[TGSI_OPCODE_IMIN] = nir_op_imin,
[TGSI_OPCODE_INEG] = nir_op_ineg,
- [TGSI_OPCODE_ISGE] = nir_op_ige32,
+ [TGSI_OPCODE_ISGE] = nir_op_ige,
[TGSI_OPCODE_ISHR] = nir_op_ishr,
- [TGSI_OPCODE_ISLT] = nir_op_ilt32,
+ [TGSI_OPCODE_ISLT] = nir_op_ilt,
[TGSI_OPCODE_F2U] = nir_op_f2u32,
[TGSI_OPCODE_U2F] = nir_op_u2f32,
[TGSI_OPCODE_UADD] = nir_op_iadd,
[TGSI_OPCODE_UMIN] = nir_op_umin,
[TGSI_OPCODE_UMOD] = nir_op_umod,
[TGSI_OPCODE_UMUL] = nir_op_imul,
- [TGSI_OPCODE_USEQ] = nir_op_ieq32,
- [TGSI_OPCODE_USGE] = nir_op_uge32,
+ [TGSI_OPCODE_USEQ] = nir_op_ieq,
+ [TGSI_OPCODE_USGE] = nir_op_uge,
[TGSI_OPCODE_USHR] = nir_op_ushr,
- [TGSI_OPCODE_USLT] = nir_op_ult32,
- [TGSI_OPCODE_USNE] = nir_op_ine32,
+ [TGSI_OPCODE_USLT] = nir_op_ult,
+ [TGSI_OPCODE_USNE] = nir_op_ine,
[TGSI_OPCODE_SWITCH] = 0, /* not emitted by glsl_to_tgsi.cpp */
[TGSI_OPCODE_CASE] = 0, /* not emitted by glsl_to_tgsi.cpp */
/* XXX: SAMPLE opcodes */
- [TGSI_OPCODE_UARL] = nir_op_imov,
+ [TGSI_OPCODE_UARL] = nir_op_mov,
[TGSI_OPCODE_UCMP] = 0,
[TGSI_OPCODE_IABS] = nir_op_iabs,
[TGSI_OPCODE_ISSG] = nir_op_isign,
[TGSI_OPCODE_INTERP_CENTROID] = 0, /* XXX */
[TGSI_OPCODE_INTERP_SAMPLE] = 0, /* XXX */
[TGSI_OPCODE_INTERP_OFFSET] = 0, /* XXX */
+
+ [TGSI_OPCODE_F2D] = nir_op_f2f64,
+ [TGSI_OPCODE_D2F] = nir_op_f2f32,
+ [TGSI_OPCODE_DMUL] = nir_op_fmul,
+ [TGSI_OPCODE_D2U] = nir_op_f2u32,
+ [TGSI_OPCODE_U2D] = nir_op_u2f64,
+
+ [TGSI_OPCODE_U64ADD] = nir_op_iadd,
+ [TGSI_OPCODE_U64MUL] = nir_op_imul,
+ [TGSI_OPCODE_U64DIV] = nir_op_udiv,
+ [TGSI_OPCODE_U64SNE] = nir_op_ine,
};
static void
}
nir_alu_dest dest = ttn_get_dest(c, tgsi_dst);
+ unsigned tgsi_dst_type = tgsi_opcode_infer_dst_type(tgsi_op, 0);
+
+ /* The destination bitsize of the NIR opcode (not TGSI, where it's always
+ * 32 bits). This needs to be passed into ttn_alu() because it can't be
+ * inferred for comparison opcodes.
+ */
+ unsigned dst_bitsize = tgsi_type_is_64bit(tgsi_dst_type) ? 64 : 32;
+
switch (tgsi_op) {
case TGSI_OPCODE_RSQ:
ttn_move_dest(b, dest, nir_frsq(b, ttn_channel(b, src[0], X)));
default:
if (op_trans[tgsi_op] != 0 || tgsi_op == TGSI_OPCODE_MOV) {
- ttn_alu(b, op_trans[tgsi_op], dest, src);
+ ttn_alu(b, op_trans[tgsi_op], dest, dst_bitsize, src);
} else {
fprintf(stderr, "unknown TGSI opcode: %s\n",
tgsi_get_opcode_name(tgsi_op));
c->cap_samplers_as_deref = screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF);
c->cap_face_is_sysval = screen->get_param(screen, PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL);
c->cap_position_is_sysval = screen->get_param(screen, PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL);
+ c->cap_point_is_sysval = screen->get_param(screen, PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL);
}
/**
s->num_uniforms = scan.const_file_max[0] + 1;
s->num_outputs = scan.file_max[TGSI_FILE_OUTPUT] + 1;
- s->info.vs.window_space_position = scan.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
+ for (unsigned i = 0; i < TGSI_PROPERTY_COUNT; i++) {
+ unsigned value = scan.properties[i];
+
+ switch (i) {
+ case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
+ break; /* handled in ttn_emit_declaration */
+ case TGSI_PROPERTY_FS_COORD_ORIGIN:
+ s->info.fs.origin_upper_left = value == TGSI_FS_COORD_ORIGIN_UPPER_LEFT;
+ break;
+ case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER:
+ s->info.fs.pixel_center_integer = value == TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
+ break;
+ case TGSI_PROPERTY_FS_DEPTH_LAYOUT:
+ s->info.fs.depth_layout = ttn_get_depth_layout(value);
+ break;
+ case TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION:
+ s->info.vs.window_space_position = value;
+ break;
+ case TGSI_PROPERTY_NEXT_SHADER:
+ s->info.next_stage = tgsi_processor_to_shader_stage(value);
+ break;
+ default:
+ if (value) {
+ fprintf(stderr, "tgsi_to_nir: unhandled TGSI property %u = %u\n",
+ i, value);
+ unreachable("unhandled TGSI property");
+ }
+ }
+ }
c->inputs = rzalloc_array(c, struct nir_variable *, s->num_inputs);
c->outputs = rzalloc_array(c, struct nir_variable *, s->num_outputs);
NIR_PASS_V(nir, nir_lower_vars_to_ssa);
if (scalar) {
- NIR_PASS_V(nir, nir_lower_alu_to_scalar);
+ NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL);
NIR_PASS_V(nir, nir_lower_phis_to_scalar);
}
NIR_PASS(progress, nir, nir_opt_dce);
}
- NIR_PASS(progress, nir, nir_opt_if);
+ NIR_PASS(progress, nir, nir_opt_if, false);
NIR_PASS(progress, nir, nir_opt_dead_cf);
NIR_PASS(progress, nir, nir_opt_cse);
NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
projects / mesa.git / blobdiff