file == TGSI_FILE_CONSTANT);
/* nothing to do for UBOs: */
- if ((file == TGSI_FILE_CONSTANT) && decl->Declaration.Dimension)
+ if ((file == TGSI_FILE_CONSTANT) && decl->Declaration.Dimension) {
+ b->shader->info.num_ubos =
+ MAX2(b->shader->info.num_ubos, decl->Dim.Index2D);
return;
+ }
if ((file == TGSI_FILE_INPUT) || (file == TGSI_FILE_OUTPUT)) {
is_array = (is_array && decl->Declaration.Array &&
var->data.mode = nir_var_shader_in;
var->name = ralloc_asprintf(var, "in_%d", idx);
- if (c->scan->processor == TGSI_PROCESSOR_FRAGMENT) {
- var->data.location =
- tgsi_varying_semantic_to_slot(decl->Semantic.Name,
- decl->Semantic.Index);
+ if (c->scan->processor == PIPE_SHADER_FRAGMENT) {
+ if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
+ var->data.location = SYSTEM_VALUE_FRONT_FACE;
+ var->data.mode = nir_var_system_value;
+ } else {
+ var->data.location =
+ tgsi_varying_semantic_to_slot(decl->Semantic.Name,
+ decl->Semantic.Index);
+ }
} else {
assert(!decl->Declaration.Semantic);
var->data.location = VERT_ATTRIB_GENERIC0 + idx;
*/
switch (decl->Interp.Interpolate) {
case TGSI_INTERPOLATE_CONSTANT:
- var->data.interpolation = INTERP_QUALIFIER_FLAT;
+ var->data.interpolation = INTERP_MODE_FLAT;
break;
case TGSI_INTERPOLATE_LINEAR:
- var->data.interpolation = INTERP_QUALIFIER_NOPERSPECTIVE;
+ var->data.interpolation = INTERP_MODE_NOPERSPECTIVE;
break;
case TGSI_INTERPOLATE_PERSPECTIVE:
- var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
+ var->data.interpolation = INTERP_MODE_SMOOTH;
break;
}
exec_list_push_tail(&b->shader->inputs, &var->node);
+
+ for (int i = 0; i < array_size; i++)
+ b->shader->info.inputs_read |= 1 << (var->data.location + i);
+
break;
case TGSI_FILE_OUTPUT: {
int semantic_name = decl->Semantic.Name;
var->name = ralloc_asprintf(var, "out_%d", idx);
var->data.index = 0;
- if (c->scan->processor == TGSI_PROCESSOR_FRAGMENT) {
+ if (c->scan->processor == PIPE_SHADER_FRAGMENT) {
switch (semantic_name) {
case TGSI_SEMANTIC_COLOR: {
/* TODO tgsi loses some information, so we cannot
}
exec_list_push_tail(&b->shader->outputs, &var->node);
+
+ for (int i = 0; i < array_size; i++)
+ b->shader->info.outputs_written |= 1 << (var->data.location + i);
}
break;
case TGSI_FILE_CONSTANT:
nir_load_const_instr *load_const;
int i;
- load_const = nir_load_const_instr_create(b->shader, 4);
+ load_const = nir_load_const_instr_create(b->shader, 4, 32);
c->imm_defs[c->next_imm] = &load_const->def;
c->next_imm++;
nir_builder_instr_insert(b, &load->instr);
src = nir_src_for_ssa(&load->dest.ssa);
+
+ b->shader->info.system_values_read |=
+ (1 << nir_system_value_from_intrinsic(op));
+
break;
}
switch (file) {
case TGSI_FILE_INPUT:
+ /* Special case: Turn the frontface varying into a load of the
+ * frontface intrinsic plus math, and appending the silly floats.
+ */
+ if (c->scan->processor == PIPE_SHADER_FRAGMENT &&
+ c->scan->input_semantic_name[index] == TGSI_SEMANTIC_FACE) {
+ nir_ssa_def *tgsi_frontface[4] = {
+ nir_bcsel(&c->build,
+ nir_load_system_value(&c->build,
+ nir_intrinsic_load_front_face, 0),
+ nir_imm_float(&c->build, 1.0),
+ nir_imm_float(&c->build, -1.0)),
+ nir_imm_float(&c->build, 0.0),
+ nir_imm_float(&c->build, 0.0),
+ nir_imm_float(&c->build, 1.0),
+ };
+
+ return nir_src_for_ssa(nir_vec(&c->build, tgsi_frontface, 4));
+ }
+
op = nir_intrinsic_load_input;
assert(!dim);
break;
static void
ttn_arl(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
{
- ttn_move_dest(b, dest, nir_f2i(b, nir_ffloor(b, src[0])));
+ ttn_move_dest(b, dest, nir_f2i32(b, nir_ffloor(b, src[0])));
}
/* EXP - Approximate Exponential Base 2
ttn_move_dest(b, dest, nir_slt(b, src[1], src[0]));
}
-static void
-ttn_clamp(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
-{
- ttn_move_dest(b, dest, nir_fmin(b, nir_fmax(b, src[0], src[1]), src[2]));
-}
-
-static void
-ttn_xpd(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
-{
- ttn_move_dest_masked(b, dest,
- nir_fsub(b,
- nir_fmul(b,
- ttn_swizzle(b, src[0], Y, Z, X, X),
- ttn_swizzle(b, src[1], Z, X, Y, X)),
- nir_fmul(b,
- ttn_swizzle(b, src[1], Y, Z, X, X),
- ttn_swizzle(b, src[0], Z, X, Y, X))),
- TGSI_WRITEMASK_XYZ);
- ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_W);
-}
-
-static void
-ttn_dp2a(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
-{
- ttn_move_dest(b, dest,
- ttn_channel(b, nir_fadd(b, nir_fdot2(b, src[0], src[1]),
- src[2]),
- X));
-}
-
static void
ttn_dp2(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
{
ttn_move_dest(b, dest, nir_fdot4(b, src[0], src[1]));
}
-static void
-ttn_dph(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
-{
- ttn_move_dest(b, dest, nir_fadd(b, nir_fdot3(b, src[0], src[1]),
- ttn_channel(b, src[1], W)));
-}
-
static void
ttn_umad(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
{
nir_intrinsic_instr *discard =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard);
nir_builder_instr_insert(b, &discard->instr);
+ b->shader->info.fs.uses_discard = true;
}
static void
nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if);
discard->src[0] = nir_src_for_ssa(cmp);
nir_builder_instr_insert(b, &discard->instr);
+ b->shader->info.fs.uses_discard = true;
}
static void
case GLSL_SAMPLER_DIM_CUBE:
instr->coord_components = 3;
break;
+ case GLSL_SAMPLER_DIM_SUBPASS:
+ case GLSL_SAMPLER_DIM_SUBPASS_MS:
+ unreachable("invalid sampler_dim");
}
if (instr->is_array)
}
if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXD) {
+ instr->src[src_number].src_type = nir_tex_src_ddx;
instr->src[src_number].src =
nir_src_for_ssa(nir_swizzle(b, src[1], SWIZ(X, Y, Z, W),
- instr->coord_components, false));
- instr->src[src_number].src_type = nir_tex_src_ddx;
+ nir_tex_instr_src_size(instr, src_number),
+ false));
src_number++;
+ instr->src[src_number].src_type = nir_tex_src_ddy;
instr->src[src_number].src =
nir_src_for_ssa(nir_swizzle(b, src[2], SWIZ(X, Y, Z, W),
- instr->coord_components, false));
- instr->src[src_number].src_type = nir_tex_src_ddy;
+ nir_tex_instr_src_size(instr, src_number),
+ false));
src_number++;
}
else
instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], Z));
- instr->src[src_number].src_type = nir_tex_src_comparitor;
+ instr->src[src_number].src_type = nir_tex_src_comparator;
src_number++;
}
assert(src_number == num_srcs);
- nir_ssa_dest_init(&instr->instr, &instr->dest, 4, 32, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest,
+ nir_tex_instr_dest_size(instr),
+ 32, NULL);
nir_builder_instr_insert(b, &instr->instr);
/* Resolve the writemask on the texture op. */
txs->src[0].src = nir_src_for_ssa(ttn_channel(b, src[0], X));
txs->src[0].src_type = nir_tex_src_lod;
- nir_ssa_dest_init(&txs->instr, &txs->dest, 3, 32, NULL);
+ nir_ssa_dest_init(&txs->instr, &txs->dest,
+ nir_tex_instr_dest_size(txs), 32, NULL);
nir_builder_instr_insert(b, &txs->instr);
nir_ssa_dest_init(&qlv->instr, &qlv->dest, 1, 32, NULL);
[TGSI_OPCODE_SLT] = nir_op_slt,
[TGSI_OPCODE_SGE] = nir_op_sge,
[TGSI_OPCODE_MAD] = nir_op_ffma,
- [TGSI_OPCODE_SUB] = nir_op_fsub,
[TGSI_OPCODE_LRP] = 0,
[TGSI_OPCODE_SQRT] = nir_op_fsqrt,
- [TGSI_OPCODE_DP2A] = 0,
[TGSI_OPCODE_FRC] = nir_op_ffract,
- [TGSI_OPCODE_CLAMP] = 0,
[TGSI_OPCODE_FLR] = nir_op_ffloor,
[TGSI_OPCODE_ROUND] = nir_op_fround_even,
[TGSI_OPCODE_EX2] = nir_op_fexp2,
[TGSI_OPCODE_LG2] = nir_op_flog2,
[TGSI_OPCODE_POW] = nir_op_fpow,
- [TGSI_OPCODE_XPD] = 0,
- [TGSI_OPCODE_ABS] = nir_op_fabs,
- [TGSI_OPCODE_DPH] = 0,
[TGSI_OPCODE_COS] = nir_op_fcos,
[TGSI_OPCODE_DDX] = nir_op_fddx,
[TGSI_OPCODE_DDY] = nir_op_fddy,
[TGSI_OPCODE_TXB] = 0,
[TGSI_OPCODE_DIV] = nir_op_fdiv,
[TGSI_OPCODE_DP2] = 0,
- [TGSI_OPCODE_DP2A] = 0,
[TGSI_OPCODE_TXL] = 0,
[TGSI_OPCODE_BRK] = 0,
[TGSI_OPCODE_DDX_FINE] = nir_op_fddx_fine,
[TGSI_OPCODE_DDY_FINE] = nir_op_fddy_fine,
- [TGSI_OPCODE_PUSHA] = 0, /* XXX */
- [TGSI_OPCODE_POPA] = 0, /* XXX */
-
[TGSI_OPCODE_CEIL] = nir_op_fceil,
- [TGSI_OPCODE_I2F] = nir_op_i2f,
+ [TGSI_OPCODE_I2F] = nir_op_i2f32,
[TGSI_OPCODE_NOT] = nir_op_inot,
[TGSI_OPCODE_TRUNC] = nir_op_ftrunc,
[TGSI_OPCODE_SHL] = nir_op_ishl,
[TGSI_OPCODE_OR] = nir_op_ior,
[TGSI_OPCODE_MOD] = nir_op_umod,
[TGSI_OPCODE_XOR] = nir_op_ixor,
- [TGSI_OPCODE_SAD] = 0, /* XXX */
[TGSI_OPCODE_TXF] = 0,
[TGSI_OPCODE_TXQ] = 0,
[TGSI_OPCODE_ENDLOOP] = 0,
[TGSI_OPCODE_ENDSUB] = 0, /* XXX: no function calls */
- [TGSI_OPCODE_TXQ_LZ] = 0,
[TGSI_OPCODE_NOP] = 0,
[TGSI_OPCODE_FSEQ] = nir_op_feq,
[TGSI_OPCODE_FSGE] = nir_op_fge,
[TGSI_OPCODE_FSLT] = nir_op_flt,
[TGSI_OPCODE_FSNE] = nir_op_fne,
- /* No control flow yet */
- [TGSI_OPCODE_CALLNZ] = 0, /* XXX */
- [TGSI_OPCODE_BREAKC] = 0, /* not emitted by glsl_to_tgsi.cpp */
-
[TGSI_OPCODE_KILL_IF] = 0,
[TGSI_OPCODE_END] = 0,
- [TGSI_OPCODE_F2I] = nir_op_f2i,
+ [TGSI_OPCODE_F2I] = nir_op_f2i32,
[TGSI_OPCODE_IDIV] = nir_op_idiv,
[TGSI_OPCODE_IMAX] = nir_op_imax,
[TGSI_OPCODE_IMIN] = nir_op_imin,
[TGSI_OPCODE_ISGE] = nir_op_ige,
[TGSI_OPCODE_ISHR] = nir_op_ishr,
[TGSI_OPCODE_ISLT] = nir_op_ilt,
- [TGSI_OPCODE_F2U] = nir_op_f2u,
- [TGSI_OPCODE_U2F] = nir_op_u2f,
+ [TGSI_OPCODE_F2U] = nir_op_f2u32,
+ [TGSI_OPCODE_U2F] = nir_op_u2f32,
[TGSI_OPCODE_UADD] = nir_op_iadd,
[TGSI_OPCODE_UDIV] = nir_op_udiv,
[TGSI_OPCODE_UMAD] = 0,
ttn_lit(b, op_trans[tgsi_op], dest, src);
break;
- case TGSI_OPCODE_CLAMP:
- ttn_clamp(b, op_trans[tgsi_op], dest, src);
- break;
-
- case TGSI_OPCODE_XPD:
- ttn_xpd(b, op_trans[tgsi_op], dest, src);
- break;
-
case TGSI_OPCODE_DP2:
ttn_dp2(b, op_trans[tgsi_op], dest, src);
break;
ttn_dp4(b, op_trans[tgsi_op], dest, src);
break;
- case TGSI_OPCODE_DP2A:
- ttn_dp2a(b, op_trans[tgsi_op], dest, src);
- break;
-
- case TGSI_OPCODE_DPH:
- ttn_dph(b, op_trans[tgsi_op], dest, src);
- break;
-
case TGSI_OPCODE_UMAD:
ttn_umad(b, op_trans[tgsi_op], dest, src);
break;
case TGSI_OPCODE_TEX2:
case TGSI_OPCODE_TXL2:
case TGSI_OPCODE_TXB2:
- case TGSI_OPCODE_TXQ_LZ:
case TGSI_OPCODE_TXF:
case TGSI_OPCODE_TG4:
case TGSI_OPCODE_LODQ:
nir_intrinsic_instr *store =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output);
unsigned loc = var->data.driver_location + i;
- store->num_components = 4;
- store->src[0].reg.reg = c->output_regs[loc].reg;
- store->src[0].reg.base_offset = c->output_regs[loc].offset;
+
+ nir_src src = nir_src_for_reg(c->output_regs[loc].reg);
+ src.reg.base_offset = c->output_regs[loc].offset;
+
+ if (c->build.shader->stage == MESA_SHADER_FRAGMENT &&
+ var->data.location == FRAG_RESULT_DEPTH) {
+ /* TGSI uses TGSI_SEMANTIC_POSITION.z for the depth output, while
+ * NIR uses a single float FRAG_RESULT_DEPTH.
+ */
+ src = nir_src_for_ssa(nir_channel(b, nir_ssa_for_src(b, src, 4), 2));
+ store->num_components = 1;
+ } else {
+ store->num_components = 4;
+ }
+ store->src[0] = src;
+
nir_intrinsic_set_base(store, loc);
nir_intrinsic_set_write_mask(store, 0xf);
store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
tgsi_processor_to_shader_stage(unsigned processor)
{
switch (processor) {
- case TGSI_PROCESSOR_FRAGMENT: return MESA_SHADER_FRAGMENT;
- case TGSI_PROCESSOR_VERTEX: return MESA_SHADER_VERTEX;
- case TGSI_PROCESSOR_GEOMETRY: return MESA_SHADER_GEOMETRY;
- case TGSI_PROCESSOR_TESS_CTRL: return MESA_SHADER_TESS_CTRL;
- case TGSI_PROCESSOR_TESS_EVAL: return MESA_SHADER_TESS_EVAL;
- case TGSI_PROCESSOR_COMPUTE: return MESA_SHADER_COMPUTE;
+ case PIPE_SHADER_FRAGMENT: return MESA_SHADER_FRAGMENT;
+ case PIPE_SHADER_VERTEX: return MESA_SHADER_VERTEX;
+ case PIPE_SHADER_GEOMETRY: return MESA_SHADER_GEOMETRY;
+ case PIPE_SHADER_TESS_CTRL: return MESA_SHADER_TESS_CTRL;
+ case PIPE_SHADER_TESS_EVAL: return MESA_SHADER_TESS_EVAL;
+ case PIPE_SHADER_COMPUTE: return MESA_SHADER_COMPUTE;
default:
unreachable("invalid TGSI processor");
}
projects / mesa.git / blobdiff