#include "glsl/nir/nir_control_flow.h"
#include "glsl/nir/nir_builder.h"
#include "glsl/list.h"
-#include "glsl/shader_enums.h"
+#include "glsl/nir/shader_enums.h"
#include "nir/tgsi_to_nir.h"
#include "tgsi/tgsi_parse.h"
#define ttn_channel(b, src, swiz) \
nir_swizzle(b, src, SWIZ(swiz, swiz, swiz, swiz), 1, false)
+static gl_varying_slot
+tgsi_varying_semantic_to_slot(unsigned semantic, unsigned index)
+{
+ switch (semantic) {
+ case TGSI_SEMANTIC_POSITION:
+ return VARYING_SLOT_POS;
+ case TGSI_SEMANTIC_COLOR:
+ if (index == 0)
+ return VARYING_SLOT_COL0;
+ else
+ return VARYING_SLOT_COL1;
+ case TGSI_SEMANTIC_BCOLOR:
+ if (index == 0)
+ return VARYING_SLOT_BFC0;
+ else
+ return VARYING_SLOT_BFC1;
+ case TGSI_SEMANTIC_FOG:
+ return VARYING_SLOT_FOGC;
+ case TGSI_SEMANTIC_PSIZE:
+ return VARYING_SLOT_PSIZ;
+ case TGSI_SEMANTIC_GENERIC:
+ return VARYING_SLOT_VAR0 + index;
+ case TGSI_SEMANTIC_FACE:
+ return VARYING_SLOT_FACE;
+ case TGSI_SEMANTIC_EDGEFLAG:
+ return VARYING_SLOT_EDGE;
+ case TGSI_SEMANTIC_PRIMID:
+ return VARYING_SLOT_PRIMITIVE_ID;
+ case TGSI_SEMANTIC_CLIPDIST:
+ if (index == 0)
+ return VARYING_SLOT_CLIP_DIST0;
+ else
+ return VARYING_SLOT_CLIP_DIST1;
+ case TGSI_SEMANTIC_CLIPVERTEX:
+ return VARYING_SLOT_CLIP_VERTEX;
+ case TGSI_SEMANTIC_TEXCOORD:
+ return VARYING_SLOT_TEX0 + index;
+ case TGSI_SEMANTIC_PCOORD:
+ return VARYING_SLOT_PNTC;
+ case TGSI_SEMANTIC_VIEWPORT_INDEX:
+ return VARYING_SLOT_VIEWPORT;
+ case TGSI_SEMANTIC_LAYER:
+ return VARYING_SLOT_LAYER;
+ default:
+ fprintf(stderr, "Bad TGSI semantic: %d/%d\n", semantic, index);
+ abort();
+ }
+}
+
+/* Temporary helper to remap back to TGSI style semantic name/index
+ * values, for use in drivers that haven't been converted to using
+ * VARYING_SLOT_
+ */
+void
+varying_slot_to_tgsi_semantic(gl_varying_slot slot,
+ unsigned *semantic_name, unsigned *semantic_index)
+{
+ static const unsigned map[][2] = {
+ [VARYING_SLOT_POS] = { TGSI_SEMANTIC_POSITION, 0 },
+ [VARYING_SLOT_COL0] = { TGSI_SEMANTIC_COLOR, 0 },
+ [VARYING_SLOT_COL1] = { TGSI_SEMANTIC_COLOR, 1 },
+ [VARYING_SLOT_BFC0] = { TGSI_SEMANTIC_BCOLOR, 0 },
+ [VARYING_SLOT_BFC1] = { TGSI_SEMANTIC_BCOLOR, 1 },
+ [VARYING_SLOT_FOGC] = { TGSI_SEMANTIC_FOG, 0 },
+ [VARYING_SLOT_PSIZ] = { TGSI_SEMANTIC_PSIZE, 0 },
+ [VARYING_SLOT_FACE] = { TGSI_SEMANTIC_FACE, 0 },
+ [VARYING_SLOT_EDGE] = { TGSI_SEMANTIC_EDGEFLAG, 0 },
+ [VARYING_SLOT_PRIMITIVE_ID] = { TGSI_SEMANTIC_PRIMID, 0 },
+ [VARYING_SLOT_CLIP_DIST0] = { TGSI_SEMANTIC_CLIPDIST, 0 },
+ [VARYING_SLOT_CLIP_DIST1] = { TGSI_SEMANTIC_CLIPDIST, 1 },
+ [VARYING_SLOT_CLIP_VERTEX] = { TGSI_SEMANTIC_CLIPVERTEX, 0 },
+ [VARYING_SLOT_PNTC] = { TGSI_SEMANTIC_PCOORD, 0 },
+ [VARYING_SLOT_VIEWPORT] = { TGSI_SEMANTIC_VIEWPORT_INDEX, 0 },
+ [VARYING_SLOT_LAYER] = { TGSI_SEMANTIC_LAYER, 0 },
+ };
+
+ if (slot >= VARYING_SLOT_VAR0) {
+ *semantic_name = TGSI_SEMANTIC_GENERIC;
+ *semantic_index = slot - VARYING_SLOT_VAR0;
+ return;
+ }
+
+ if (slot >= VARYING_SLOT_TEX0 && slot <= VARYING_SLOT_TEX7) {
+ *semantic_name = TGSI_SEMANTIC_TEXCOORD;
+ *semantic_index = slot - VARYING_SLOT_TEX0;
+ return;
+ }
+
+ if (slot >= ARRAY_SIZE(map)) {
+ fprintf(stderr, "Unknown varying slot %d\n", slot);
+ abort();
+ }
+
+ *semantic_name = map[slot][0];
+ *semantic_index = map[slot][1];
+}
+
+/* Temporary helper to remap back to TGSI style semantic name/index
+ * values, for use in drivers that haven't been converted to using
+ * FRAG_RESULT_
+ */
+void
+frag_result_to_tgsi_semantic(gl_frag_result slot,
+ unsigned *semantic_name, unsigned *semantic_index)
+{
+ static const unsigned map[][2] = {
+ [FRAG_RESULT_DEPTH] = { TGSI_SEMANTIC_POSITION, 0 },
+ [FRAG_RESULT_COLOR] = { TGSI_SEMANTIC_COLOR, -1 },
+ [FRAG_RESULT_DATA0 + 0] = { TGSI_SEMANTIC_COLOR, 0 },
+ [FRAG_RESULT_DATA0 + 1] = { TGSI_SEMANTIC_COLOR, 1 },
+ [FRAG_RESULT_DATA0 + 2] = { TGSI_SEMANTIC_COLOR, 2 },
+ [FRAG_RESULT_DATA0 + 3] = { TGSI_SEMANTIC_COLOR, 3 },
+ [FRAG_RESULT_DATA0 + 4] = { TGSI_SEMANTIC_COLOR, 4 },
+ [FRAG_RESULT_DATA0 + 5] = { TGSI_SEMANTIC_COLOR, 5 },
+ [FRAG_RESULT_DATA0 + 6] = { TGSI_SEMANTIC_COLOR, 6 },
+ [FRAG_RESULT_DATA0 + 7] = { TGSI_SEMANTIC_COLOR, 7 },
+ };
+
+ *semantic_name = map[slot][0];
+ *semantic_index = map[slot][1];
+}
+
static nir_ssa_def *
ttn_src_for_dest(nir_builder *b, nir_alu_dest *dest)
{
type = nir_type_int;
break;
case TGSI_RETURN_TYPE_UINT:
- type = nir_type_unsigned;
+ type = nir_type_uint;
break;
case TGSI_RETURN_TYPE_FLOAT:
default:
var->data.mode = nir_var_shader_in;
var->name = ralloc_asprintf(var, "in_%d", idx);
- /* We should probably translate to a VERT_ATTRIB_* or VARYING_SLOT_*
- * instead, but nothing in NIR core is looking at the value
- * currently, and this is less change to drivers.
- */
- var->data.location = decl->Semantic.Name;
- var->data.index = decl->Semantic.Index;
+ if (c->scan->processor == TGSI_PROCESSOR_FRAGMENT) {
+ var->data.location =
+ tgsi_varying_semantic_to_slot(decl->Semantic.Name,
+ decl->Semantic.Index);
+ } else {
+ assert(!decl->Declaration.Semantic);
+ var->data.location = VERT_ATTRIB_GENERIC0 + idx;
+ }
+ var->data.index = 0;
/* We definitely need to translate the interpolation field, because
* nir_print will decode it.
exec_list_push_tail(&b->shader->inputs, &var->node);
break;
case TGSI_FILE_OUTPUT: {
+ int semantic_name = decl->Semantic.Name;
+ int semantic_index = decl->Semantic.Index;
/* Since we can't load from outputs in the IR, we make temporaries
* for the outputs and emit stores to the real outputs at the end of
* the shader.
var->data.mode = nir_var_shader_out;
var->name = ralloc_asprintf(var, "out_%d", idx);
-
- var->data.location = decl->Semantic.Name;
- if (decl->Semantic.Name == TGSI_SEMANTIC_COLOR &&
- decl->Semantic.Index == 0 &&
- c->scan->properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
- var->data.index = -1;
- else
- var->data.index = decl->Semantic.Index;
+ var->data.index = 0;
+
+ if (c->scan->processor == TGSI_PROCESSOR_FRAGMENT) {
+ switch (semantic_name) {
+ case TGSI_SEMANTIC_COLOR: {
+ /* TODO tgsi loses some information, so we cannot
+ * actually differentiate here between DSB and MRT
+ * at this point. But so far no drivers using tgsi-
+ * to-nir support dual source blend:
+ */
+ bool dual_src_blend = false;
+ if (dual_src_blend && (semantic_index == 1)) {
+ var->data.location = FRAG_RESULT_DATA0;
+ var->data.index = 1;
+ } else {
+ if (c->scan->properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
+ var->data.location = FRAG_RESULT_COLOR;
+ else
+ var->data.location = FRAG_RESULT_DATA0 + semantic_index;
+ }
+ break;
+ }
+ case TGSI_SEMANTIC_POSITION:
+ var->data.location = FRAG_RESULT_DEPTH;
+ break;
+ default:
+ fprintf(stderr, "Bad TGSI semantic: %d/%d\n",
+ decl->Semantic.Name, decl->Semantic.Index);
+ abort();
+ }
+ } else {
+ var->data.location =
+ tgsi_varying_semantic_to_slot(semantic_name, semantic_index);
+ }
if (is_array) {
unsigned j;
nir_builder_instr_insert(b, &load_const->instr);
}
-static nir_src
+static nir_ssa_def *
ttn_src_for_indirect(struct ttn_compile *c, struct tgsi_ind_register *indirect);
/* generate either a constant or indirect deref chain for accessing an
if (indirect) {
arr->deref_array_type = nir_deref_array_type_indirect;
- arr->indirect = ttn_src_for_indirect(c, indirect);
+ arr->indirect = nir_src_for_ssa(ttn_src_for_indirect(c, indirect));
} else {
arr->deref_array_type = nir_deref_array_type_direct;
}
switch (file) {
case TGSI_FILE_INPUT:
- op = indirect ? nir_intrinsic_load_input_indirect :
- nir_intrinsic_load_input;
+ op = nir_intrinsic_load_input;
assert(!dim);
break;
case TGSI_FILE_CONSTANT:
if (dim) {
- op = indirect ? nir_intrinsic_load_ubo_indirect :
- nir_intrinsic_load_ubo;
- /* convert index from vec4 to byte: */
- index *= 16;
+ op = nir_intrinsic_load_ubo;
} else {
- op = indirect ? nir_intrinsic_load_uniform_indirect :
- nir_intrinsic_load_uniform;
+ op = nir_intrinsic_load_uniform;
}
break;
default:
load = nir_intrinsic_instr_create(b->shader, op);
load->num_components = 4;
- load->const_index[0] = index;
if (dim) {
if (dimind) {
load->src[srcn] =
}
srcn++;
}
- if (indirect) {
- load->src[srcn] = ttn_src_for_indirect(c, indirect);
- if (dim) {
- assert(load->src[srcn].is_ssa);
- /* we also need to covert vec4 to byte here too: */
- load->src[srcn] =
- nir_src_for_ssa(nir_ishl(b, load->src[srcn].ssa,
- nir_imm_int(b, 4)));
+
+ nir_ssa_def *offset;
+ if (dim) {
+ /* UBO loads don't have a const_index[0] base offset. */
+ offset = nir_imm_int(b, index);
+ if (indirect) {
+ offset = nir_iadd(b, offset, ttn_src_for_indirect(c, indirect));
+ }
+ /* UBO offsets are in bytes, but TGSI gives them to us in vec4's */
+ offset = nir_ishl(b, offset, nir_imm_int(b, 4));
+ } else {
+ load->const_index[0] = index;
+ if (indirect) {
+ offset = ttn_src_for_indirect(c, indirect);
+ } else {
+ offset = nir_imm_int(b, 0);
}
- srcn++;
}
+ load->src[srcn++] = nir_src_for_ssa(offset);
+
nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
nir_builder_instr_insert(b, &load->instr);
return src;
}
-static nir_src
+static nir_ssa_def *
ttn_src_for_indirect(struct ttn_compile *c, struct tgsi_ind_register *indirect)
{
nir_builder *b = &c->build;
indirect->File,
indirect->Index,
NULL, NULL, NULL);
- return nir_src_for_ssa(nir_imov_alu(b, src, 1));
+ return nir_imov_alu(b, src, 1);
}
static nir_alu_dest
if (tgsi_dst->File == TGSI_FILE_TEMPORARY) {
if (c->temp_regs[index].var) {
- nir_builder *b = &c->build;
- nir_intrinsic_instr *load;
- struct tgsi_ind_register *indirect =
- tgsi_dst->Indirect ? &tgsi_fdst->Indirect : NULL;
nir_register *reg;
/* this works, because TGSI will give us a base offset
reg->num_components = 4;
dest.dest.reg.reg = reg;
dest.dest.reg.base_offset = 0;
-
- /* since the alu op might not write to all components
- * of the temporary, we must first do a load_var to
- * get the previous array elements into the register.
- * This is one area that NIR could use a bit of
- * improvement (or opt pass to clean up the mess
- * once things are scalarized)
- */
-
- load = nir_intrinsic_instr_create(c->build.shader,
- nir_intrinsic_load_var);
- load->num_components = 4;
- load->variables[0] =
- ttn_array_deref(c, load, c->temp_regs[index].var,
- c->temp_regs[index].offset,
- indirect);
-
- load->dest = nir_dest_for_reg(reg);
-
- nir_builder_instr_insert(b, &load->instr);
} else {
assert(!tgsi_dst->Indirect);
dest.dest.reg.reg = c->temp_regs[index].reg;
if (tgsi_dst->Indirect && (tgsi_dst->File != TGSI_FILE_TEMPORARY)) {
nir_src *indirect = ralloc(c->build.shader, nir_src);
- *indirect = ttn_src_for_indirect(c, &tgsi_fdst->Indirect);
+ *indirect = nir_src_for_ssa(ttn_src_for_indirect(c, &tgsi_fdst->Indirect));
dest.dest.reg.indirect = indirect;
}
static void
ttn_kill_if(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
{
- nir_ssa_def *cmp = nir_bany4(b, nir_flt(b, src[0], nir_imm_float(b, 0.0)));
+ nir_ssa_def *cmp = nir_bany_inequal4(b, nir_flt(b, src[0],
+ nir_imm_float(b, 0.0)),
+ nir_imm_int(b, 0));
nir_intrinsic_instr *discard =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if);
discard->src[0] = nir_src_for_ssa(cmp);
op = nir_texop_tex;
num_srcs = 1;
break;
+ case TGSI_OPCODE_TEX2:
+ op = nir_texop_tex;
+ num_srcs = 1;
+ samp = 2;
+ break;
case TGSI_OPCODE_TXP:
op = nir_texop_tex;
num_srcs = 2;
num_srcs = 3;
samp = 3;
break;
+ case TGSI_OPCODE_LODQ:
+ op = nir_texop_lod;
+ num_srcs = 1;
+ break;
default:
fprintf(stderr, "unknown TGSI tex op %d\n", tgsi_inst->Instruction.Opcode);
*/
sview = instr->sampler_index;
- if (sview < c->num_samp_types) {
+ if (op == nir_texop_lod) {
+ instr->dest_type = nir_type_float;
+ } else if (sview < c->num_samp_types) {
instr->dest_type = c->samp_types[sview];
} else {
instr->dest_type = nir_type_float;
}
if (instr->is_shadow) {
- if (instr->coord_components < 3)
- instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], Z));
- else
+ if (instr->coord_components == 4)
+ instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[1], X));
+ else if (instr->coord_components == 3)
instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], W));
+ else
+ instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], Z));
instr->src[src_number].src_type = nir_tex_src_comparitor;
src_number++;
[TGSI_OPCODE_UMUL_HI] = nir_op_umul_high,
[TGSI_OPCODE_TG4] = 0,
- [TGSI_OPCODE_LODQ] = 0, /* XXX */
+ [TGSI_OPCODE_LODQ] = 0,
[TGSI_OPCODE_IBFE] = nir_op_ibitfield_extract,
[TGSI_OPCODE_UBFE] = nir_op_ubitfield_extract,
[TGSI_OPCODE_POPC] = nir_op_bit_count,
[TGSI_OPCODE_LSB] = nir_op_find_lsb,
[TGSI_OPCODE_IMSB] = nir_op_ifind_msb,
- [TGSI_OPCODE_UMSB] = nir_op_ifind_msb, /* XXX: signed vs unsigned */
+ [TGSI_OPCODE_UMSB] = nir_op_ufind_msb,
[TGSI_OPCODE_INTERP_CENTROID] = 0, /* XXX */
[TGSI_OPCODE_INTERP_SAMPLE] = 0, /* XXX */
case TGSI_OPCODE_TXL:
case TGSI_OPCODE_TXB:
case TGSI_OPCODE_TXD:
+ case TGSI_OPCODE_TEX2:
case TGSI_OPCODE_TXL2:
case TGSI_OPCODE_TXB2:
case TGSI_OPCODE_TXQ_LZ:
case TGSI_OPCODE_TXF:
case TGSI_OPCODE_TG4:
+ case TGSI_OPCODE_LODQ:
ttn_tex(c, dest, src);
break;
ttn_move_dest(b, dest, nir_fsat(b, ttn_src_for_dest(b, &dest)));
}
- /* if the dst has a matching var, append store_global to move
+ /* if the dst has a matching var, append store_var to move
* output from reg to var
*/
nir_variable *var = ttn_get_var(c, tgsi_dst);
&tgsi_dst->Indirect : NULL;
store->num_components = 4;
+ store->const_index[0] = dest.write_mask;
store->variables[0] = ttn_array_deref(c, store, var, offset, indirect);
store->src[0] = nir_src_for_reg(dest.dest.reg.reg);
nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output);
unsigned loc = var->data.driver_location + i;
store->num_components = 4;
- store->const_index[0] = loc;
store->src[0].reg.reg = c->output_regs[loc].reg;
store->src[0].reg.base_offset = c->output_regs[loc].offset;
+ store->const_index[0] = loc;
+ store->const_index[1] = 0xf; /* writemask */
+ store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_builder_instr_insert(b, &store->instr);
}
}
case TGSI_PROCESSOR_COMPUTE: return MESA_SHADER_COMPUTE;
default:
unreachable("invalid TGSI processor");
- };
+ }
}
struct nir_shader *
tgsi_scan_shader(tgsi_tokens, &scan);
c->scan = &scan;
- s = nir_shader_create(NULL, tgsi_processor_to_shader_stage(scan.processor),
- options);
-
- nir_function *func = nir_function_create(s, "main");
- nir_function_overload *overload = nir_function_overload_create(func);
- nir_function_impl *impl = nir_function_impl_create(overload);
-
- nir_builder_init(&c->build, impl);
- c->build.cursor = nir_after_cf_list(&impl->body);
+ nir_builder_init_simple_shader(&c->build, NULL,
+ tgsi_processor_to_shader_stage(scan.processor),
+ options);
+ s = c->build.shader;
s->num_inputs = scan.file_max[TGSI_FILE_INPUT] + 1;
s->num_uniforms = scan.const_file_max[0] + 1;
projects / mesa.git / blobdiff