#define TEMP_P0 TGSI_EXEC_TEMP_P0
#define IS_CHANNEL_ENABLED(INST, CHAN)\
- ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IS_CHANNEL_ENABLED2(INST, CHAN)\
- ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
#define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
{
uint i, chan;
- uint writemask = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ uint writemask = inst->Dst[0].Register.WriteMask;
if (writemask == TGSI_WRITEMASK_X ||
writemask == TGSI_WRITEMASK_Y ||
writemask == TGSI_WRITEMASK_Z ||
/* loop over src regs */
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- if ((inst->FullSrcRegisters[i].SrcRegister.File ==
- inst->FullDstRegisters[0].DstRegister.File) &&
- (inst->FullSrcRegisters[i].SrcRegister.Index ==
- inst->FullDstRegisters[0].DstRegister.Index)) {
+ if ((inst->Src[i].Register.File ==
+ inst->Dst[0].Register.File) &&
+ (inst->Src[i].Register.Index ==
+ inst->Dst[0].Register.Index)) {
/* loop over dest channels */
uint channelsWritten = 0x0;
FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
/* check if we're reading a channel that's been written */
- uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->FullSrcRegisters[i], chan);
+ uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
if (channelsWritten & (1 << swizzle)) {
return TRUE;
}
numInstructions++;
break;
+ case TGSI_TOKEN_TYPE_PROPERTY:
+ break;
+
default:
assert( 0 );
}
dst->f[0] =
dst->f[1] =
dst->f[2] =
- dst->f[3] = src->f[TILE_TOP_LEFT] - src->f[TILE_BOTTOM_LEFT];
+ dst->f[3] = src->f[TILE_BOTTOM_LEFT] - src->f[TILE_TOP_LEFT];
}
static void
break;
case TGSI_FILE_INPUT:
+ case TGSI_FILE_SYSTEM_VALUE:
chan->u[0] = mach->Inputs[index->i[0]].xyzw[swizzle].u[0];
chan->u[1] = mach->Inputs[index->i[1]].xyzw[swizzle].u[1];
chan->u[2] = mach->Inputs[index->i[2]].xyzw[swizzle].u[2];
*
* file[1],
* where:
- * file = SrcRegister.File
- * [1] = SrcRegister.Index
+ * file = Register.File
+ * [1] = Register.Index
*/
index.i[0] =
index.i[1] =
index.i[2] =
- index.i[3] = reg->SrcRegister.Index;
+ index.i[3] = reg->Register.Index;
/* There is an extra source register that indirectly subscripts
* a register file. The direct index now becomes an offset
*
* file[ind[2].x+1],
* where:
- * ind = SrcRegisterInd.File
- * [2] = SrcRegisterInd.Index
- * .x = SrcRegisterInd.SwizzleX
+ * ind = Indirect.File
+ * [2] = Indirect.Index
+ * .x = Indirect.SwizzleX
*/
- if (reg->SrcRegister.Indirect) {
+ if (reg->Register.Indirect) {
union tgsi_exec_channel index2;
union tgsi_exec_channel indir_index;
const uint execmask = mach->ExecMask;
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterInd.Index;
+ index2.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
- swizzle = tgsi_util_get_src_register_swizzle( ®->SrcRegisterInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( ®->Indirect, CHAN_X );
fetch_src_file_channel(
mach,
- reg->SrcRegisterInd.File,
+ reg->Indirect.File,
swizzle,
&index2,
&indir_index );
*
* file[1][3] == file[1*sizeof(file[1])+3],
* where:
- * [3] = SrcRegisterDim.Index
+ * [3] = Dimension.Index
*/
- if (reg->SrcRegister.Dimension) {
+ if (reg->Register.Dimension) {
/* The size of the first-order array depends on the register file type.
* We need to multiply the index to the first array to get an effective,
* "flat" index that points to the beginning of the second-order array.
*/
- switch (reg->SrcRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_INPUT:
+ case TGSI_FILE_SYSTEM_VALUE:
index.i[0] *= TGSI_EXEC_MAX_INPUT_ATTRIBS;
index.i[1] *= TGSI_EXEC_MAX_INPUT_ATTRIBS;
index.i[2] *= TGSI_EXEC_MAX_INPUT_ATTRIBS;
assert( 0 );
}
- index.i[0] += reg->SrcRegisterDim.Index;
- index.i[1] += reg->SrcRegisterDim.Index;
- index.i[2] += reg->SrcRegisterDim.Index;
- index.i[3] += reg->SrcRegisterDim.Index;
+ index.i[0] += reg->Dimension.Index;
+ index.i[1] += reg->Dimension.Index;
+ index.i[2] += reg->Dimension.Index;
+ index.i[3] += reg->Dimension.Index;
/* Again, the second subscript index can be addressed indirectly
* identically to the first one.
*
* file[1][ind[4].y+3],
* where:
- * ind = SrcRegisterDimInd.File
- * [4] = SrcRegisterDimInd.Index
- * .y = SrcRegisterDimInd.SwizzleX
+ * ind = DimIndirect.File
+ * [4] = DimIndirect.Index
+ * .y = DimIndirect.SwizzleX
*/
- if (reg->SrcRegisterDim.Indirect) {
+ if (reg->Dimension.Indirect) {
union tgsi_exec_channel index2;
union tgsi_exec_channel indir_index;
const uint execmask = mach->ExecMask;
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterDimInd.Index;
+ index2.i[3] = reg->DimIndirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle( ®->SrcRegisterDimInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( ®->DimIndirect, CHAN_X );
fetch_src_file_channel(
mach,
- reg->SrcRegisterDimInd.File,
+ reg->DimIndirect.File,
swizzle,
&index2,
&indir_index );
}
/* If by any chance there was a need for a 3D array of register
- * files, we would have to check whether SrcRegisterDim is followed
+ * files, we would have to check whether Dimension is followed
* by a dimension register and continue the saga.
*/
}
swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
fetch_src_file_channel(
mach,
- reg->SrcRegister.File,
+ reg->Register.File,
swizzle,
&index,
chan );
*
* file[ind[2].x+1],
* where:
- * ind = DstRegisterInd.File
- * [2] = DstRegisterInd.Index
- * .x = DstRegisterInd.SwizzleX
+ * ind = Indirect.File
+ * [2] = Indirect.Index
+ * .x = Indirect.SwizzleX
*/
- if (reg->DstRegister.Indirect) {
+ if (reg->Register.Indirect) {
union tgsi_exec_channel index;
union tgsi_exec_channel indir_index;
uint swizzle;
index.i[0] =
index.i[1] =
index.i[2] =
- index.i[3] = reg->DstRegisterInd.Index;
+ index.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
- swizzle = tgsi_util_get_src_register_swizzle( ®->DstRegisterInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( ®->Indirect, CHAN_X );
/* fetch values from the address/indirection register */
fetch_src_file_channel(
mach,
- reg->DstRegisterInd.File,
+ reg->Indirect.File,
swizzle,
&index,
&indir_index );
offset = (int) indir_index.f[0];
}
- switch (reg->DstRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_NULL:
dst = &null;
break;
case TGSI_FILE_OUTPUT:
index = mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
- + reg->DstRegister.Index;
+ + reg->Register.Index;
dst = &mach->Outputs[offset + index].xyzw[chan_index];
break;
case TGSI_FILE_TEMPORARY:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
assert( index < TGSI_EXEC_NUM_TEMPS );
dst = &mach->Temps[offset + index].xyzw[chan_index];
break;
case TGSI_FILE_ADDRESS:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
dst = &mach->Addrs[index].xyzw[chan_index];
break;
case TGSI_FILE_LOOP:
- assert(reg->DstRegister.Index == 0);
+ assert(reg->Register.Index == 0);
assert(mach->LoopCounterStackTop > 0);
assert(chan_index == CHAN_X);
dst = &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[chan_index];
break;
case TGSI_FILE_PREDICATE:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
assert(index < TGSI_EXEC_NUM_PREDS);
dst = &mach->Predicates[index].xyzw[chan_index];
break;
switch (chan_index) {
case CHAN_X:
- swizzle = inst->InstructionPredicate.SwizzleX;
+ swizzle = inst->Predicate.SwizzleX;
break;
case CHAN_Y:
- swizzle = inst->InstructionPredicate.SwizzleY;
+ swizzle = inst->Predicate.SwizzleY;
break;
case CHAN_Z:
- swizzle = inst->InstructionPredicate.SwizzleZ;
+ swizzle = inst->Predicate.SwizzleZ;
break;
case CHAN_W:
- swizzle = inst->InstructionPredicate.SwizzleW;
+ swizzle = inst->Predicate.SwizzleW;
break;
default:
assert(0);
return;
}
- assert(inst->InstructionPredicate.Index == 0);
+ assert(inst->Predicate.Index == 0);
- pred = &mach->Predicates[inst->InstructionPredicate.Index].xyzw[swizzle];
+ pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
- if (inst->InstructionPredicate.Negate) {
+ if (inst->Predicate.Negate) {
for (i = 0; i < QUAD_SIZE; i++) {
if (pred->u[i]) {
execmask &= ~(1 << i);
}
#define FETCH(VAL,INDEX,CHAN)\
- fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN)
+ fetch_source (mach, VAL, &inst->Src[INDEX], CHAN)
#define STORE(VAL,INDEX,CHAN)\
- store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
+ store_dest (mach, VAL, &inst->Dst[INDEX], inst, CHAN )
/**
/* unswizzle channel */
swizzle = tgsi_util_get_full_src_register_swizzle (
- &inst->FullSrcRegisters[0],
+ &inst->Src[0],
chan_index);
/* check if the component has not been already tested */
boolean biasLod,
boolean projected)
{
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].Register.Index;
union tgsi_exec_channel r[4];
uint chan_index;
float lodBias;
/* debug_printf("Sampler %u unit %u\n", sampler, unit); */
- switch (inst->InstructionTexture.Texture) {
+ switch (inst->Texture.Texture) {
case TGSI_TEXTURE_1D:
case TGSI_TEXTURE_SHADOW1D:
exec_txd(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
- const uint unit = inst->FullSrcRegisters[3].SrcRegister.Index;
+ const uint unit = inst->Src[3].Register.Index;
union tgsi_exec_channel r[4];
uint chan_index;
* XXX: This is fake TXD -- the derivatives are not taken into account, yet.
*/
- switch (inst->InstructionTexture.Texture) {
+ switch (inst->Texture.Texture) {
case TGSI_TEXTURE_1D:
case TGSI_TEXTURE_SHADOW1D:
const struct tgsi_full_declaration *decl)
{
if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
- if (decl->Declaration.File == TGSI_FILE_INPUT) {
+ if (decl->Declaration.File == TGSI_FILE_INPUT ||
+ decl->Declaration.File == TGSI_FILE_SYSTEM_VALUE) {
uint first, last, mask;
- first = decl->DeclarationRange.First;
- last = decl->DeclarationRange.Last;
+ first = decl->Range.First;
+ last = decl->Range.Last;
mask = decl->Declaration.UsageMask;
- if (decl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION) {
- assert(decl->Semantic.SemanticIndex == 0);
+ if (decl->Semantic.Name == TGSI_SEMANTIC_POSITION) {
+ assert(decl->Semantic.Index == 0);
assert(first == last);
assert(mask = TGSI_WRITEMASK_XYZW);
mach->Inputs[first] = mach->QuadPos;
- } else if (decl->Semantic.SemanticName == TGSI_SEMANTIC_FACE) {
+ } else if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
uint i;
- assert(decl->Semantic.SemanticIndex == 0);
+ assert(decl->Semantic.Index == 0);
assert(first == last);
for (i = 0; i < QUAD_SIZE; i++) {
mach->FuncStack[mach->FuncStackTop++] = mach->FuncMask;
/* Finally, jump to the subroutine */
- *pc = inst->InstructionLabel.Label;
+ *pc = inst->Label.Label;
}
break;
break;
case TGSI_OPCODE_ENDSUB:
- /* no-op */
+ /*
+ * XXX: This really should be a no-op. We should never reach this opcode.
+ */
+
+ assert(mach->CallStackTop > 0);
+ mach->CallStackTop--;
+
+ mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
+ mach->CondMask = mach->CondStack[mach->CondStackTop];
+
+ mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
+ mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
+
+ mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
+ mach->ContMask = mach->ContStack[mach->ContStackTop];
+
+ assert(mach->FuncStackTop > 0);
+ mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
+
+ *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
+
+ UPDATE_EXEC_MASK(mach);
break;
case TGSI_OPCODE_NOP:
break;
+ case TGSI_OPCODE_BREAKC:
+ FETCH(&r[0], 0, CHAN_X);
+ /* update CondMask */
+ if (r[0].u[0] && (mach->ExecMask & 0x1)) {
+ mach->LoopMask &= ~0x1;
+ }
+ if (r[0].u[1] && (mach->ExecMask & 0x2)) {
+ mach->LoopMask &= ~0x2;
+ }
+ if (r[0].u[2] && (mach->ExecMask & 0x4)) {
+ mach->LoopMask &= ~0x4;
+ }
+ if (r[0].u[3] && (mach->ExecMask & 0x8)) {
+ mach->LoopMask &= ~0x8;
+ }
+ /* Todo: if mach->LoopMask == 0, jump to end of loop */
+ UPDATE_EXEC_MASK(mach);
+ break;
+
default:
assert( 0 );
}
}
#endif
+ assert(mach->CondStackTop == 0);
+ assert(mach->LoopStackTop == 0);
+ assert(mach->ContStackTop == 0);
+ assert(mach->CallStackTop == 0);
+
return ~mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0];
}
projects / mesa.git / blobdiff