assert(src->f[2] != 0.0f);
assert(src->f[3] != 0.0f);
#endif
- dst->f[0] = 1.0f / sqrtf(fabsf(src->f[0]));
- dst->f[1] = 1.0f / sqrtf(fabsf(src->f[1]));
- dst->f[2] = 1.0f / sqrtf(fabsf(src->f[2]));
- dst->f[3] = 1.0f / sqrtf(fabsf(src->f[3]));
+ dst->f[0] = 1.0f / sqrtf(src->f[0]);
+ dst->f[1] = 1.0f / sqrtf(src->f[1]);
+ dst->f[2] = 1.0f / sqrtf(src->f[2]);
+ dst->f[3] = 1.0f / sqrtf(src->f[3]);
}
static void
micro_sqrt(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src)
{
- dst->f[0] = sqrtf(fabsf(src->f[0]));
- dst->f[1] = sqrtf(fabsf(src->f[1]));
- dst->f[2] = sqrtf(fabsf(src->f[2]));
- dst->f[3] = sqrtf(fabsf(src->f[3]));
+ dst->f[0] = sqrtf(src->f[0]);
+ dst->f[1] = sqrtf(src->f[1]);
+ dst->f[2] = sqrtf(src->f[2]);
+ dst->f[3] = sqrtf(src->f[3]);
}
static void
++mach->NumOutputs;
}
}
- if (parse.FullToken.FullDeclaration.Declaration.File ==
- TGSI_FILE_IMMEDIATE_ARRAY) {
- unsigned reg;
- struct tgsi_full_declaration *decl =
- &parse.FullToken.FullDeclaration;
- debug_assert(decl->Range.Last < TGSI_EXEC_NUM_IMMEDIATES);
- for (reg = decl->Range.First; reg <= decl->Range.Last; ++reg) {
- for( i = 0; i < 4; i++ ) {
- int idx = reg * 4 + i;
- mach->ImmArray[reg][i] = decl->ImmediateData.u[idx].Float;
- }
- }
- }
memcpy(declarations + numDeclarations,
&parse.FullToken.FullDeclaration,
sizeof(declarations[0]));
}
break;
- case TGSI_FILE_TEMPORARY_ARRAY:
- for (i = 0; i < TGSI_QUAD_SIZE; i++) {
- assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
- assert(index2D->i[i] < TGSI_EXEC_NUM_TEMP_ARRAYS);
-
- chan->u[i] =
- mach->TempArray[index2D->i[i]][index->i[i]].xyzw[swizzle].u[i];
- }
- break;
-
case TGSI_FILE_IMMEDIATE:
for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] >= 0 && index->i[i] < (int)mach->ImmLimit);
}
break;
- case TGSI_FILE_IMMEDIATE_ARRAY:
- for (i = 0; i < TGSI_QUAD_SIZE; i++) {
- assert(index2D->i[i] == 0);
-
- chan->f[i] = mach->ImmArray[index->i[i]][swizzle];
- }
- break;
-
case TGSI_FILE_ADDRESS:
for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] >= 0);
index2.i[2] =
index2.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
- swizzle = tgsi_util_get_src_register_swizzle( ®->Indirect, TGSI_CHAN_X );
+ swizzle = reg->Indirect.Swizzle;
fetch_src_file_channel(mach,
chan_index,
reg->Indirect.File,
index2.i[2] =
index2.i[3] = reg->DimIndirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle( ®->DimIndirect, TGSI_CHAN_X );
+ swizzle = reg->DimIndirect.Swizzle;
fetch_src_file_channel(mach,
chan_index,
reg->DimIndirect.File,
index.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
- swizzle = tgsi_util_get_src_register_swizzle( ®->Indirect, TGSI_CHAN_X );
+ swizzle = reg->Indirect.Swizzle;
/* fetch values from the address/indirection register */
fetch_src_file_channel(mach,
index2.i[2] =
index2.i[3] = reg->DimIndirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle( ®->DimIndirect, TGSI_CHAN_X );
+ swizzle = reg->DimIndirect.Swizzle;
fetch_src_file_channel(mach,
chan_index,
reg->DimIndirect.File,
dst = &mach->Temps[offset + index].xyzw[chan_index];
break;
- case TGSI_FILE_TEMPORARY_ARRAY:
- index = reg->Register.Index;
- assert( index < TGSI_EXEC_NUM_TEMPS );
- assert( index2D.i[0] < TGSI_EXEC_NUM_TEMP_ARRAYS );
- /* XXX we use index2D.i[0] here but somehow we might
- * end up with someone trying to store indirectly in
- * different buffers */
- dst = &mach->TempArray[index2D.i[0]][offset + index].xyzw[chan_index];
- break;
-
case TGSI_FILE_ADDRESS:
index = reg->Register.Index;
dst = &mach->Addrs[index].xyzw[chan_index];
* Kill fragment if any of the four values is less than zero.
*/
static void
-exec_kil(struct tgsi_exec_machine *mach,
- const struct tgsi_full_instruction *inst)
+exec_kill_if(struct tgsi_exec_machine *mach,
+ const struct tgsi_full_instruction *inst)
{
uint uniquemask;
uint chan_index;
kilmask |= 1 << i;
}
+ /* restrict to fragments currently executing */
+ kilmask &= mach->ExecMask;
+
mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
}
/**
- * Execute NVIDIA-style KIL which is predicated by a condition code.
- * Kill fragment if the condition code is TRUE.
+ * Unconditional fragment kill/discard.
*/
static void
-exec_kilp(struct tgsi_exec_machine *mach,
+exec_kill(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
uint kilmask; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
- /* "unconditional" kil */
+ /* kill fragment for all fragments currently executing */
kilmask = mach->ExecMask;
mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
}
uint modifier, uint sampler)
{
const uint unit = inst->Src[sampler].Register.Index;
- union tgsi_exec_channel r[4], cubearraycomp, cubelod;
- const union tgsi_exec_channel *lod = &ZeroVec;
+ const union tgsi_exec_channel *args[5], *proj = NULL;
+ union tgsi_exec_channel r[5];
enum tgsi_sampler_control control = tgsi_sampler_lod_none;
uint chan;
int8_t offsets[3];
+ int dim, shadow_ref, i;
/* always fetch all 3 offsets, overkill but keeps code simple */
fetch_texel_offsets(mach, inst, offsets);
assert(modifier != TEX_MODIFIER_LEVEL_ZERO);
+ assert(inst->Texture.Texture != TGSI_TEXTURE_BUFFER);
- if (modifier != TEX_MODIFIER_NONE && (sampler == 1)) {
- FETCH(&r[3], 0, TGSI_CHAN_W);
- if (modifier != TEX_MODIFIER_PROJECTED) {
- lod = &r[3];
- }
- }
-
- if (modifier == TEX_MODIFIER_EXPLICIT_LOD) {
- control = tgsi_sampler_lod_explicit;
- } else if (modifier == TEX_MODIFIER_LOD_BIAS){
- control = tgsi_sampler_lod_bias;
- }
-
- switch (inst->Texture.Texture) {
- case TGSI_TEXTURE_1D:
- FETCH(&r[0], 0, TGSI_CHAN_X);
-
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
- }
-
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &ZeroVec, &ZeroVec, &ZeroVec, lod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
- break;
-
- case TGSI_TEXTURE_SHADOW1D:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
+ dim = tgsi_util_get_texture_coord_dim(inst->Texture.Texture, &shadow_ref);
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
- micro_div(&r[2], &r[2], &r[3]);
- }
-
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &ZeroVec, &r[2], &ZeroVec, lod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
- break;
+ assert(dim <= 4);
+ if (shadow_ref >= 0)
+ assert(shadow_ref >= dim && shadow_ref < Elements(args));
- case TGSI_TEXTURE_2D:
- case TGSI_TEXTURE_RECT:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
+ /* fetch modifier to the last argument */
+ if (modifier != TEX_MODIFIER_NONE) {
+ const int last = Elements(args) - 1;
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
- micro_div(&r[1], &r[1], &r[3]);
+ /* fetch modifier from src0.w or src1.x */
+ if (sampler == 1) {
+ assert(dim <= TGSI_CHAN_W && shadow_ref != TGSI_CHAN_W);
+ FETCH(&r[last], 0, TGSI_CHAN_W);
}
-
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &ZeroVec, &ZeroVec, lod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
-
- case TGSI_TEXTURE_SHADOW2D:
- case TGSI_TEXTURE_SHADOWRECT:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
-
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
- micro_div(&r[1], &r[1], &r[3]);
- micro_div(&r[2], &r[2], &r[3]);
+ else {
+ assert(shadow_ref != 4);
+ FETCH(&r[last], 1, TGSI_CHAN_X);
}
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &r[2], &ZeroVec, lod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
-
- case TGSI_TEXTURE_1D_ARRAY:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
-
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
+ if (modifier != TEX_MODIFIER_PROJECTED) {
+ args[last] = &r[last];
}
-
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &ZeroVec, &ZeroVec, lod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
- case TGSI_TEXTURE_SHADOW1D_ARRAY:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
-
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
- micro_div(&r[2], &r[2], &r[3]);
+ else {
+ proj = &r[last];
+ args[last] = &ZeroVec;
}
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &r[2], &ZeroVec, lod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
-
- case TGSI_TEXTURE_2D_ARRAY:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
-
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
- micro_div(&r[1], &r[1], &r[3]);
- }
+ /* point unused arguments to zero vector */
+ for (i = dim; i < last; i++)
+ args[i] = &ZeroVec;
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &r[2], &ZeroVec, lod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
- case TGSI_TEXTURE_SHADOW2D_ARRAY:
- case TGSI_TEXTURE_SHADOWCUBE:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
- FETCH(&r[3], 0, TGSI_CHAN_W);
+ if (modifier == TEX_MODIFIER_EXPLICIT_LOD)
+ control = tgsi_sampler_lod_explicit;
+ else if (modifier == TEX_MODIFIER_LOD_BIAS)
+ control = tgsi_sampler_lod_bias;
+ }
+ else {
+ for (i = dim; i < Elements(args); i++)
+ args[i] = &ZeroVec;
+ }
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &r[2], &r[3], &ZeroVec, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
- case TGSI_TEXTURE_CUBE_ARRAY:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
- FETCH(&r[3], 0, TGSI_CHAN_W);
+ /* fetch coordinates */
+ for (i = 0; i < dim; i++) {
+ FETCH(&r[i], 0, TGSI_CHAN_X + i);
- if (modifier == TEX_MODIFIER_EXPLICIT_LOD ||
- modifier == TEX_MODIFIER_LOD_BIAS)
- FETCH(&cubelod, 1, TGSI_CHAN_X);
- else
- cubelod = ZeroVec;
+ if (proj)
+ micro_div(&r[i], &r[i], proj);
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &r[2], &r[3], &cubelod, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
- case TGSI_TEXTURE_3D:
- case TGSI_TEXTURE_CUBE:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
-
- if (modifier == TEX_MODIFIER_PROJECTED) {
- micro_div(&r[0], &r[0], &r[3]);
- micro_div(&r[1], &r[1], &r[3]);
- micro_div(&r[2], &r[2], &r[3]);
- }
-
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &r[2], &ZeroVec, lod,
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]);
- break;
+ args[i] = &r[i];
+ }
- case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
- FETCH(&r[0], 0, TGSI_CHAN_X);
- FETCH(&r[1], 0, TGSI_CHAN_Y);
- FETCH(&r[2], 0, TGSI_CHAN_Z);
- FETCH(&r[3], 0, TGSI_CHAN_W);
+ /* fetch reference value */
+ if (shadow_ref >= 0) {
+ FETCH(&r[shadow_ref], shadow_ref / 4, TGSI_CHAN_X + (shadow_ref % 4));
- FETCH(&cubearraycomp, 1, TGSI_CHAN_X);
+ if (proj)
+ micro_div(&r[shadow_ref], &r[shadow_ref], proj);
- fetch_texel(mach->Sampler, unit, unit,
- &r[0], &r[1], &r[2], &r[3], &cubearraycomp, /* S, T, P, C, LOD */
- NULL, offsets, control,
- &r[0], &r[1], &r[2], &r[3]); /* outputs */
- break;
- default:
- assert(0);
+ args[shadow_ref] = &r[shadow_ref];
}
+ fetch_texel(mach->Sampler, unit, unit,
+ args[0], args[1], args[2], args[3], args[4],
+ NULL, offsets, control,
+ &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
+
#if 0
debug_printf("fetch r: %g %g %g %g\n",
r[0].f[0], r[0].f[1], r[0].f[2], r[0].f[3]);
r[3].f[j] = rgba[3][j];
}
- for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
- if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
- store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
+ if (inst->Instruction.Opcode == TGSI_OPCODE_SAMPLE_I) {
+ unsigned char swizzles[4];
+ swizzles[0] = inst->Src[1].Register.SwizzleX;
+ swizzles[1] = inst->Src[1].Register.SwizzleY;
+ swizzles[2] = inst->Src[1].Register.SwizzleZ;
+ swizzles[3] = inst->Src[1].Register.SwizzleW;
+
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
+ if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
+ store_dest(mach, &r[swizzles[chan]],
+ &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
+ }
+ }
+ }
+ else {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
+ if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
+ store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
+ }
}
}
}
fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_INT);
+ /* XXX: This interface can't return per-pixel values */
mach->Sampler->get_dims(mach->Sampler, unit, src.i[0], result);
for (i = 0; i < TGSI_QUAD_SIZE; i++) {
const union tgsi_exec_channel *lod = &ZeroVec;
enum tgsi_sampler_control control = tgsi_sampler_lod_none;
uint chan;
+ unsigned char swizzles[4];
int8_t offsets[3];
/* always fetch all 3 offsets, overkill but keeps code simple */
assert(0);
}
+ swizzles[0] = inst->Src[1].Register.SwizzleX;
+ swizzles[1] = inst->Src[1].Register.SwizzleY;
+ swizzles[2] = inst->Src[1].Register.SwizzleZ;
+ swizzles[3] = inst->Src[1].Register.SwizzleW;
+
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
- store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
+ store_dest(mach, &r[swizzles[chan]],
+ &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
}
}
union tgsi_exec_channel r[4];
float derivs[3][2][TGSI_QUAD_SIZE];
uint chan;
+ unsigned char swizzles[4];
int8_t offsets[3];
/* always fetch all 3 offsets, overkill but keeps code simple */
assert(0);
}
+ swizzles[0] = inst->Src[1].Register.SwizzleX;
+ swizzles[1] = inst->Src[1].Register.SwizzleY;
+ swizzles[2] = inst->Src[1].Register.SwizzleZ;
+ swizzles[3] = inst->Src[1].Register.SwizzleW;
+
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
- store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
+ store_dest(mach, &r[swizzles[chan]],
+ &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
}
}
union tgsi_exec_channel dst;
fetch_source(mach, &src[0], &inst->Src[0], TGSI_CHAN_X, src_datatype);
- fetch_source(mach, &src[1], &inst->Src[1], TGSI_CHAN_Y, src_datatype);
+ fetch_source(mach, &src[1], &inst->Src[1], TGSI_CHAN_X, src_datatype);
op(&dst, &src[0], &src[1]);
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
UPDATE_EXEC_MASK(mach);
}
+/* FIXME: this will only work if default is last */
static void
exec_default(struct tgsi_exec_machine *mach)
{
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->u[0] = src0->u[0] << src1->u[0];
- dst->u[1] = src0->u[1] << src1->u[1];
- dst->u[2] = src0->u[2] << src1->u[2];
- dst->u[3] = src0->u[3] << src1->u[3];
+ unsigned masked_count;
+ masked_count = src1->u[0] & 0x1f;
+ dst->u[0] = src0->u[0] << masked_count;
+ masked_count = src1->u[1] & 0x1f;
+ dst->u[1] = src0->u[1] << masked_count;
+ masked_count = src1->u[2] & 0x1f;
+ dst->u[2] = src0->u[2] << masked_count;
+ masked_count = src1->u[3] & 0x1f;
+ dst->u[3] = src0->u[3] << masked_count;
}
static void
dst->i[3] = (int)src->f[3];
}
+static void
+micro_fseq(union tgsi_exec_channel *dst,
+ const union tgsi_exec_channel *src0,
+ const union tgsi_exec_channel *src1)
+{
+ dst->u[0] = src0->f[0] == src1->f[0] ? ~0 : 0;
+ dst->u[1] = src0->f[1] == src1->f[1] ? ~0 : 0;
+ dst->u[2] = src0->f[2] == src1->f[2] ? ~0 : 0;
+ dst->u[3] = src0->f[3] == src1->f[3] ? ~0 : 0;
+}
+
+static void
+micro_fsge(union tgsi_exec_channel *dst,
+ const union tgsi_exec_channel *src0,
+ const union tgsi_exec_channel *src1)
+{
+ dst->u[0] = src0->f[0] >= src1->f[0] ? ~0 : 0;
+ dst->u[1] = src0->f[1] >= src1->f[1] ? ~0 : 0;
+ dst->u[2] = src0->f[2] >= src1->f[2] ? ~0 : 0;
+ dst->u[3] = src0->f[3] >= src1->f[3] ? ~0 : 0;
+}
+
+static void
+micro_fslt(union tgsi_exec_channel *dst,
+ const union tgsi_exec_channel *src0,
+ const union tgsi_exec_channel *src1)
+{
+ dst->u[0] = src0->f[0] < src1->f[0] ? ~0 : 0;
+ dst->u[1] = src0->f[1] < src1->f[1] ? ~0 : 0;
+ dst->u[2] = src0->f[2] < src1->f[2] ? ~0 : 0;
+ dst->u[3] = src0->f[3] < src1->f[3] ? ~0 : 0;
+}
+
+static void
+micro_fsne(union tgsi_exec_channel *dst,
+ const union tgsi_exec_channel *src0,
+ const union tgsi_exec_channel *src1)
+{
+ dst->u[0] = src0->f[0] != src1->f[0] ? ~0 : 0;
+ dst->u[1] = src0->f[1] != src1->f[1] ? ~0 : 0;
+ dst->u[2] = src0->f[2] != src1->f[2] ? ~0 : 0;
+ dst->u[3] = src0->f[3] != src1->f[3] ? ~0 : 0;
+}
+
static void
micro_idiv(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->i[0] = src0->i[0] >> src1->i[0];
- dst->i[1] = src0->i[1] >> src1->i[1];
- dst->i[2] = src0->i[2] >> src1->i[2];
- dst->i[3] = src0->i[3] >> src1->i[3];
+ unsigned masked_count;
+ masked_count = src1->i[0] & 0x1f;
+ dst->i[0] = src0->i[0] >> masked_count;
+ masked_count = src1->i[1] & 0x1f;
+ dst->i[1] = src0->i[1] >> masked_count;
+ masked_count = src1->i[2] & 0x1f;
+ dst->i[2] = src0->i[2] >> masked_count;
+ masked_count = src1->i[3] & 0x1f;
+ dst->i[3] = src0->i[3] >> masked_count;
}
static void
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->u[0] = src0->u[0] / src1->u[0];
- dst->u[1] = src0->u[1] / src1->u[1];
- dst->u[2] = src0->u[2] / src1->u[2];
- dst->u[3] = src0->u[3] / src1->u[3];
+ dst->u[0] = src1->u[0] ? src0->u[0] / src1->u[0] : ~0u;
+ dst->u[1] = src1->u[1] ? src0->u[1] / src1->u[1] : ~0u;
+ dst->u[2] = src1->u[2] ? src0->u[2] / src1->u[2] : ~0u;
+ dst->u[3] = src1->u[3] ? src0->u[3] / src1->u[3] : ~0u;
}
static void
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->u[0] = src0->u[0] % src1->u[0];
- dst->u[1] = src0->u[1] % src1->u[1];
- dst->u[2] = src0->u[2] % src1->u[2];
- dst->u[3] = src0->u[3] % src1->u[3];
+ dst->u[0] = src1->u[0] ? src0->u[0] % src1->u[0] : ~0u;
+ dst->u[1] = src1->u[1] ? src0->u[1] % src1->u[1] : ~0u;
+ dst->u[2] = src1->u[2] ? src0->u[2] % src1->u[2] : ~0u;
+ dst->u[3] = src1->u[3] ? src0->u[3] % src1->u[3] : ~0u;
}
static void
dst->u[3] = src0->u[3] * src1->u[3];
}
+static void
+micro_imul_hi(union tgsi_exec_channel *dst,
+ const union tgsi_exec_channel *src0,
+ const union tgsi_exec_channel *src1)
+{
+#define I64M(x, y) ((((int64_t)x) * ((int64_t)y)) >> 32)
+ dst->i[0] = I64M(src0->i[0], src1->i[0]);
+ dst->i[1] = I64M(src0->i[1], src1->i[1]);
+ dst->i[2] = I64M(src0->i[2], src1->i[2]);
+ dst->i[3] = I64M(src0->i[3], src1->i[3]);
+#undef I64M
+}
+
+static void
+micro_umul_hi(union tgsi_exec_channel *dst,
+ const union tgsi_exec_channel *src0,
+ const union tgsi_exec_channel *src1)
+{
+#define U64M(x, y) ((((uint64_t)x) * ((uint64_t)y)) >> 32)
+ dst->u[0] = U64M(src0->u[0], src1->u[0]);
+ dst->u[1] = U64M(src0->u[1], src1->u[1]);
+ dst->u[2] = U64M(src0->u[2], src1->u[2]);
+ dst->u[3] = U64M(src0->u[3], src1->u[3]);
+#undef U64M
+}
+
static void
micro_useq(union tgsi_exec_channel *dst,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src0,
const union tgsi_exec_channel *src1)
{
- dst->u[0] = src0->u[0] >> src1->u[0];
- dst->u[1] = src0->u[1] >> src1->u[1];
- dst->u[2] = src0->u[2] >> src1->u[2];
- dst->u[3] = src0->u[3] >> src1->u[3];
+ unsigned masked_count;
+ masked_count = src1->u[0] & 0x1f;
+ dst->u[0] = src0->u[0] >> masked_count;
+ masked_count = src1->u[1] & 0x1f;
+ dst->u[1] = src0->u[1] >> masked_count;
+ masked_count = src1->u[2] & 0x1f;
+ dst->u[2] = src0->u[2] >> masked_count;
+ masked_count = src1->u[3] & 0x1f;
+ dst->u[3] = src0->u[3] >> masked_count;
}
static void
break;
case TGSI_OPCODE_SQRT:
- exec_vector_unary(mach, inst, micro_sqrt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
+ exec_scalar_unary(mach, inst, micro_sqrt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
break;
case TGSI_OPCODE_DP2A:
exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
break;
- case TGSI_OPCODE_KILP:
- exec_kilp (mach, inst);
+ case TGSI_OPCODE_KILL:
+ exec_kill (mach, inst);
break;
- case TGSI_OPCODE_KIL:
- exec_kil (mach, inst);
+ case TGSI_OPCODE_KILL_IF:
+ exec_kill_if (mach, inst);
break;
case TGSI_OPCODE_PK2H:
mach->CondStack[mach->CondStackTop++] = mach->CondMask;
FETCH( &r[0], 0, TGSI_CHAN_X );
/* update CondMask */
+ if( ! r[0].f[0] ) {
+ mach->CondMask &= ~0x1;
+ }
+ if( ! r[0].f[1] ) {
+ mach->CondMask &= ~0x2;
+ }
+ if( ! r[0].f[2] ) {
+ mach->CondMask &= ~0x4;
+ }
+ if( ! r[0].f[3] ) {
+ mach->CondMask &= ~0x8;
+ }
+ UPDATE_EXEC_MASK(mach);
+ /* Todo: If CondMask==0, jump to ELSE */
+ break;
+
+ case TGSI_OPCODE_UIF:
+ /* push CondMask */
+ assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
+ mach->CondStack[mach->CondStackTop++] = mach->CondMask;
+ IFETCH( &r[0], 0, TGSI_CHAN_X );
+ /* update CondMask */
if( ! r[0].u[0] ) {
mach->CondMask &= ~0x1;
}
break;
case TGSI_OPCODE_BREAKC:
- FETCH(&r[0], 0, TGSI_CHAN_X);
+ IFETCH(&r[0], 0, TGSI_CHAN_X);
/* update CondMask */
if (r[0].u[0] && (mach->ExecMask & 0x1)) {
mach->LoopMask &= ~0x1;
exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
break;
+ case TGSI_OPCODE_FSEQ:
+ exec_vector_binary(mach, inst, micro_fseq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
+ break;
+
+ case TGSI_OPCODE_FSGE:
+ exec_vector_binary(mach, inst, micro_fsge, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
+ break;
+
+ case TGSI_OPCODE_FSLT:
+ exec_vector_binary(mach, inst, micro_fslt, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
+ break;
+
+ case TGSI_OPCODE_FSNE:
+ exec_vector_binary(mach, inst, micro_fsne, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
+ break;
+
case TGSI_OPCODE_IDIV:
exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
break;
exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
break;
+ case TGSI_OPCODE_IMUL_HI:
+ exec_vector_binary(mach, inst, micro_imul_hi, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
+ break;
+
+ case TGSI_OPCODE_UMUL_HI:
+ exec_vector_binary(mach, inst, micro_umul_hi, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
+ break;
+
case TGSI_OPCODE_USEQ:
exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
break;
{
uint i;
int pc = 0;
+ uint default_mask = 0xf;
- mach->CondMask = 0xf;
- mach->LoopMask = 0xf;
- mach->ContMask = 0xf;
- mach->FuncMask = 0xf;
- mach->ExecMask = 0xf;
+ mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] = 0;
+ mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] = 0;
- mach->Switch.mask = 0xf;
+ if( mach->Processor == TGSI_PROCESSOR_GEOMETRY ) {
+ mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0] = 0;
+ mach->Primitives[0] = 0;
+ /* GS runs on a single primitive for now */
+ default_mask = 0x1;
+ }
+
+ mach->CondMask = default_mask;
+ mach->LoopMask = default_mask;
+ mach->ContMask = default_mask;
+ mach->FuncMask = default_mask;
+ mach->ExecMask = default_mask;
+
+ mach->Switch.mask = default_mask;
assert(mach->CondStackTop == 0);
assert(mach->LoopStackTop == 0);
assert(mach->BreakStackTop == 0);
assert(mach->CallStackTop == 0);
- mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] = 0;
- mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] = 0;
-
- if( mach->Processor == TGSI_PROCESSOR_GEOMETRY ) {
- mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0] = 0;
- mach->Primitives[0] = 0;
- }
/* execute declarations (interpolants) */
for (i = 0; i < mach->NumDeclarations; i++) {
projects / mesa.git / blobdiff