/**************************************************************************
*
- * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2008 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "tgsi_iterate.h"
-DEBUG_GET_ONCE_BOOL_OPTION(print_sanity, "TGSI_PRINT_SANITY", FALSE);
+DEBUG_GET_ONCE_BOOL_OPTION(print_sanity, "TGSI_PRINT_SANITY", FALSE)
typedef struct {
uint errors;
uint warnings;
uint implied_array_size;
+ uint implied_out_array_size;
boolean print;
};
-static INLINE unsigned
+static inline unsigned
scan_register_key(const scan_register *reg)
{
unsigned key = reg->file;
"IMM",
"PRED",
"SV",
- "IMMX",
- "TEMPX"
+ "RES"
};
static boolean
}
info = tgsi_get_opcode_info( inst->Instruction.Opcode );
- if (info == NULL) {
+ if (!info) {
report_error( ctx, "(%u): Invalid instruction opcode", inst->Instruction.Opcode );
return TRUE;
}
if (!check_file_name( ctx, file ))
return TRUE;
for (i = decl->Range.First; i <= decl->Range.Last; i++) {
- /* declared TGSI_FILE_INPUT's for geometry processor
+ /* declared TGSI_FILE_INPUT's for geometry and tessellation
* have an implied second dimension */
- if (file == TGSI_FILE_INPUT &&
- ctx->iter.processor.Processor == TGSI_PROCESSOR_GEOMETRY) {
+ uint processor = ctx->iter.processor.Processor;
+ uint patch = decl->Semantic.Name == TGSI_SEMANTIC_PATCH ||
+ decl->Semantic.Name == TGSI_SEMANTIC_TESSOUTER ||
+ decl->Semantic.Name == TGSI_SEMANTIC_TESSINNER;
+ if (file == TGSI_FILE_INPUT && !patch && (
+ processor == TGSI_PROCESSOR_GEOMETRY ||
+ processor == TGSI_PROCESSOR_TESS_CTRL ||
+ processor == TGSI_PROCESSOR_TESS_EVAL)) {
uint vert;
for (vert = 0; vert < ctx->implied_array_size; ++vert) {
scan_register *reg = MALLOC(sizeof(scan_register));
fill_scan_register2d(reg, file, i, vert);
check_and_declare(ctx, reg);
}
+ } else if (file == TGSI_FILE_OUTPUT && !patch &&
+ processor == TGSI_PROCESSOR_TESS_CTRL) {
+ uint vert;
+ for (vert = 0; vert < ctx->implied_out_array_size; ++vert) {
+ scan_register *reg = MALLOC(sizeof(scan_register));
+ fill_scan_register2d(reg, file, i, vert);
+ check_and_declare(ctx, reg);
+ }
} else {
scan_register *reg = MALLOC(sizeof(scan_register));
if (decl->Declaration.Dimension) {
prop->Property.PropertyName == TGSI_PROPERTY_GS_INPUT_PRIM) {
ctx->implied_array_size = u_vertices_per_prim(prop->u[0].Data);
}
+ if (iter->processor.Processor == TGSI_PROCESSOR_TESS_CTRL &&
+ prop->Property.PropertyName == TGSI_PROPERTY_TCS_VERTICES_OUT)
+ ctx->implied_out_array_size = prop->u[0].Data;
+ return TRUE;
+}
+
+static boolean
+prolog(struct tgsi_iterate_context *iter)
+{
+ struct sanity_check_ctx *ctx = (struct sanity_check_ctx *) iter;
+ if (iter->processor.Processor == TGSI_PROCESSOR_TESS_CTRL ||
+ iter->processor.Processor == TGSI_PROCESSOR_TESS_EVAL)
+ ctx->implied_array_size = 32;
return TRUE;
}
{
struct sanity_check_ctx ctx;
- ctx.iter.prolog = NULL;
+ ctx.iter.prolog = prolog;
ctx.iter.iterate_instruction = iter_instruction;
ctx.iter.iterate_declaration = iter_declaration;
ctx.iter.iterate_immediate = iter_immediate;