st/mesa: pin driver threads to a specific L3 cache on AMD Zen (v2)

[mesa.git] / src / gallium / auxiliary / util / u_helpers.h

diff --git a/src/gallium/auxiliary/util/u_helpers.h b/src/gallium/auxiliary/util/u_helpers.h
index 1e57e32959b95f1f4457242de916c0d3cbe5fb32..f00436e3b1182289dd2e1b693138a80e143dc7fb 100644 (file)
--- a/src/gallium/auxiliary/util/u_helpers.h
+++ b/src/gallium/auxiliary/util/u_helpers.h
@@ -29,6 +29,7 @@
 #define U_HELPERS_H
 
 #include "pipe/p_state.h"
+#include "c11/threads.h"
 #include <stdio.h>
 
 #ifdef __cplusplus
@@ -50,6 +51,9 @@ bool util_upload_index_buffer(struct pipe_context *pipe,
                               struct pipe_resource **out_buffer,
                               unsigned *out_offset);
 
+void
+util_context_thread_changed(struct pipe_context *ctx, thrd_t *upper_thread);
+
 struct pipe_query *
 util_begin_pipestat_query(struct pipe_context *ctx);