Merge branch 'mesa_7_5_branch' into mesa_7_6_branch

[mesa.git] / src / gallium / drivers / cell / spu / spu_exec.c

diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c
index 6655842d593aafd7a24e7d2ed6457556c8335fef..0eaae2e451bc12258b213931fb5302cfa3988250 100644 (file)
--- a/src/gallium/drivers/cell/spu/spu_exec.c
+++ b/src/gallium/drivers/cell/spu/spu_exec.c
@@ -1150,22 +1150,10 @@ exec_instruction(
       ASSERT (0);
       break;
 
-   case TGSI_OPCODE_CND0:
-      ASSERT (0);
-      break;
-
    case TGSI_OPCODE_DP2A:
       ASSERT (0);
       break;
 
-   case TGSI_OPCODE_INDEX:
-      ASSERT (0);
-      break;
-
-   case TGSI_OPCODE_NEGATE:
-      ASSERT (0);
-      break;
-
    case TGSI_OPCODE_FRC:
       FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
          FETCH( &r[0], 0, chan_index );
@@ -1265,10 +1253,6 @@ exec_instruction(
       }
       break;
 
-    case TGSI_OPCODE_MULTIPLYMATRIX:
-       ASSERT (0);
-       break;
-
     case TGSI_OPCODE_ABS:
        FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
           FETCH(&r[0], 0, chan_index);
@@ -1770,9 +1754,9 @@ exec_instruction(
       mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]] = 0;
       break;
 
-   case TGSI_OPCODE_LOOP:
+   case TGSI_OPCODE_BGNFOR:
       /* fall-through (for now) */
-   case TGSI_OPCODE_BGNLOOP2:
+   case TGSI_OPCODE_BGNLOOP:
       /* push LoopMask and ContMasks */
       ASSERT(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
       mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
@@ -1780,9 +1764,9 @@ exec_instruction(
       mach->ContStack[mach->ContStackTop++] = mach->ContMask;
       break;
 
-   case TGSI_OPCODE_ENDLOOP:
+   case TGSI_OPCODE_ENDFOR:
       /* fall-through (for now at least) */
-   case TGSI_OPCODE_ENDLOOP2:
+   case TGSI_OPCODE_ENDLOOP:
       /* Restore ContMask, but don't pop */
       ASSERT(mach->ContStackTop > 0);
       mach->ContMask = mach->ContStack[mach->ContStackTop - 1];