etnaviv: get rid of etna_compile dependency
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_compiler_nir.c
index 2200bc45c8c4976f6ee8af2f0f11f93b5df263bb..9a4b461d3b039ddf69278f1b256c9e6d65e1d2c6 100644 (file)
@@ -31,6 +31,7 @@
 #include "etnaviv_context.h"
 #include "etnaviv_debug.h"
 #include "etnaviv_disasm.h"
+#include "etnaviv_nir.h"
 #include "etnaviv_uniforms.h"
 #include "etnaviv_util.h"
 
@@ -49,9 +50,6 @@ struct etna_compile {
    const struct etna_specs *specs;
    struct etna_shader_variant *variant;
 
-   /* register assigned to each output, indexed by driver_location */
-   unsigned output_reg[ETNA_NUM_INPUTS];
-
    /* block # to instr index */
    unsigned *block_ptr;
 
@@ -59,153 +57,14 @@ struct etna_compile {
    int inst_ptr; /* current instruction pointer */
    struct etna_inst code[ETNA_MAX_INSTRUCTIONS * ETNA_INST_SIZE];
 
+   /* constants */
+   uint64_t consts[ETNA_MAX_IMM];
+
    /* There was an error during compilation */
    bool error;
 };
 
-#define compile_error(ctx, args...) ({ \
-   printf(args); \
-   ctx->error = true; \
-   assert(0); \
-})
-
-/* io related lowering
- * run after lower_int_to_float because it adds i2f/f2i ops
- */
-static void
-etna_lower_io(nir_shader *shader, struct etna_shader_variant *v)
-{
-   bool rb_swap = shader->info.stage == MESA_SHADER_FRAGMENT && v->key.frag_rb_swap;
-
-   unsigned color_location = 0;
-   nir_foreach_variable(var, &shader->outputs) {
-      switch (var->data.location) {
-      case FRAG_RESULT_COLOR:
-      case FRAG_RESULT_DATA0:
-         color_location = var->data.driver_location;
-         break;
-      }
-   }
 
-   nir_foreach_function(function, shader) {
-      nir_builder b;
-      nir_builder_init(&b, function->impl);
-
-      nir_foreach_block(block, function->impl) {
-         nir_foreach_instr_safe(instr, block) {
-            if (instr->type == nir_instr_type_intrinsic) {
-               nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
-
-               switch (intr->intrinsic) {
-               case nir_intrinsic_load_front_face: {
-                  /* HW front_face is 0.0/1.0, not 0/~0u for bool
-                   * lower with a comparison with 0
-                   */
-                  intr->dest.ssa.bit_size = 32;
-
-                  b.cursor = nir_after_instr(instr);
-
-                  nir_ssa_def *ssa = nir_ine(&b, &intr->dest.ssa, nir_imm_int(&b, 0));
-                  if (v->key.front_ccw)
-                     nir_instr_as_alu(ssa->parent_instr)->op = nir_op_ieq;
-
-                  nir_ssa_def_rewrite_uses_after(&intr->dest.ssa,
-                                                 nir_src_for_ssa(ssa),
-                                                 ssa->parent_instr);
-               } break;
-               case nir_intrinsic_store_output: {
-                  if (!rb_swap || nir_intrinsic_base(intr) != color_location)
-                     break;
-                  b.cursor = nir_before_instr(instr);
-
-                  nir_ssa_def *ssa = nir_mov(&b, intr->src[0].ssa);
-                  nir_alu_instr *alu = nir_instr_as_alu(ssa->parent_instr);
-                  alu->src[0].swizzle[0] = 2;
-                  alu->src[0].swizzle[2] = 0;
-                  nir_instr_rewrite_src(instr, &intr->src[0], nir_src_for_ssa(ssa));
-               } break;
-               case nir_intrinsic_load_uniform: {
-                  /* multiply by 16 and convert to int */
-                  b.cursor = nir_before_instr(instr);
-                  nir_ssa_def *ssa = nir_imul(&b, intr->src[0].ssa, nir_imm_int(&b, 16));
-                  nir_instr_rewrite_src(instr, &intr->src[0], nir_src_for_ssa(ssa));
-               } break;
-               default:
-                  break;
-               }
-            }
-
-            if (instr->type != nir_instr_type_tex)
-               continue;
-
-            nir_tex_instr *tex = nir_instr_as_tex(instr);
-            nir_src *coord = NULL;
-            nir_src *lod_bias = NULL;
-            unsigned lod_bias_idx;
-
-            assert(tex->sampler_index == tex->texture_index);
-
-            for (unsigned i = 0; i < tex->num_srcs; i++) {
-               switch (tex->src[i].src_type) {
-               case nir_tex_src_coord:
-                  coord = &tex->src[i].src;
-                  break;
-               case nir_tex_src_bias:
-               case nir_tex_src_lod:
-                  assert(!lod_bias);
-                  lod_bias = &tex->src[i].src;
-                  lod_bias_idx = i;
-                  break;
-               default:
-                  assert(0);
-                  break;
-               }
-            }
-
-            if (tex->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
-               /* use a dummy load_uniform here to represent texcoord scale */
-               b.cursor = nir_before_instr(instr);
-               nir_intrinsic_instr *load =
-                  nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_uniform);
-               nir_intrinsic_set_base(load, ~tex->sampler_index);
-               load->num_components = 2;
-               load->src[0] = nir_src_for_ssa(nir_imm_float(&b, 0.0f));
-               nir_ssa_dest_init(&load->instr, &load->dest, 2, 32, NULL);
-               nir_intrinsic_set_type(load, nir_type_float);
-
-               nir_builder_instr_insert(&b, &load->instr);
-
-               nir_ssa_def *new_coord = nir_fmul(&b, coord->ssa, &load->dest.ssa);
-               nir_instr_rewrite_src(&tex->instr, coord, nir_src_for_ssa(new_coord));
-            }
-
-            /* pre HALTI5 needs texture sources in a single source */
-
-            if (!lod_bias || v->shader->specs->halti >= 5)
-               continue;
-
-            assert(coord && lod_bias && tex->coord_components < 4);
-
-            nir_alu_instr *vec = nir_alu_instr_create(shader, nir_op_vec4);
-            for (unsigned i = 0; i < tex->coord_components; i++) {
-               vec->src[i].src = nir_src_for_ssa(coord->ssa);
-               vec->src[i].swizzle[0] = i;
-            }
-            for (unsigned i = tex->coord_components; i < 4; i++)
-               vec->src[i].src = nir_src_for_ssa(lod_bias->ssa);
-
-            vec->dest.write_mask = 0xf;
-            nir_ssa_dest_init(&vec->instr, &vec->dest.dest, 4, 32, NULL);
-
-            nir_tex_instr_remove_src(tex, lod_bias_idx);
-            nir_instr_rewrite_src(&tex->instr, coord, nir_src_for_ssa(&vec->dest.dest.ssa));
-            tex->coord_components = 4;
-
-            nir_instr_insert_before(&tex->instr, &vec->instr);
-         }
-      }
-   }
-}
 
 static bool
 etna_alu_to_scalar_filter_cb(const nir_instr *instr, const void *data)
@@ -253,7 +112,7 @@ etna_alu_to_scalar_filter_cb(const nir_instr *instr, const void *data)
 }
 
 static void
-etna_lower_alu_impl(nir_function_impl *impl, struct etna_compile *c)
+etna_lower_alu_impl(nir_function_impl *impl, bool has_new_transcendentals)
 {
    nir_shader *shader = impl->function->shader;
 
@@ -273,7 +132,7 @@ etna_lower_alu_impl(nir_function_impl *impl, struct etna_compile *c)
          if (alu->op == nir_op_fsin || alu->op == nir_op_fcos) {
             b.cursor = nir_before_instr(instr);
 
-            nir_ssa_def *imm = c->specs->has_new_transcendentals ?
+            nir_ssa_def *imm = has_new_transcendentals ?
                nir_imm_float(&b, 1.0 / M_PI) :
                nir_imm_float(&b, 2.0 / M_PI);
 
@@ -284,7 +143,7 @@ etna_lower_alu_impl(nir_function_impl *impl, struct etna_compile *c)
          /* change transcendental ops to vec2 and insert vec1 mul for the result
           * TODO: do this earlier (but it breaks with optimizations)
           */
-         if (c->specs->has_new_transcendentals && (
+         if (has_new_transcendentals && (
              alu->op == nir_op_fdiv || alu->op == nir_op_flog2 ||
              alu->op == nir_op_fsin || alu->op == nir_op_fcos)) {
             nir_ssa_def *ssa = &alu->dest.dest.ssa;
@@ -311,11 +170,11 @@ etna_lower_alu_impl(nir_function_impl *impl, struct etna_compile *c)
    }
 }
 
-static void etna_lower_alu(nir_shader *shader, struct etna_compile *c)
+static void etna_lower_alu(nir_shader *shader, bool has_new_transcendentals)
 {
    nir_foreach_function(function, shader) {
       if (function->impl)
-         etna_lower_alu_impl(function->impl, c);
+         etna_lower_alu_impl(function->impl, has_new_transcendentals);
    }
 }
 
@@ -497,7 +356,7 @@ etna_emit_alu(struct etna_compile *c, nir_op op, struct etna_inst_dst dst,
 static void
 etna_emit_tex(struct etna_compile *c, nir_texop op, unsigned texid, unsigned dst_swiz,
               struct etna_inst_dst dst, struct etna_inst_src coord,
-              struct etna_inst_src lod_bias)
+              struct etna_inst_src lod_bias, struct etna_inst_src compare)
 {
    struct etna_inst inst = {
       .dst = dst,
@@ -509,6 +368,9 @@ etna_emit_tex(struct etna_compile *c, nir_texop op, unsigned texid, unsigned dst
    if (lod_bias.use)
       inst.src[1] = lod_bias;
 
+   if (compare.use)
+      inst.src[2] = compare;
+
    switch (op) {
    case nir_texop_tex: inst.opcode = INST_OPCODE_TEXLD; break;
    case nir_texop_txb: inst.opcode = INST_OPCODE_TEXLDB; break;
@@ -558,47 +420,39 @@ etna_emit_discard(struct etna_compile *c, struct etna_inst_src condition)
 }
 
 static void
-etna_emit_output(struct etna_compile *c, unsigned index, struct etna_inst_src src)
+etna_emit_output(struct etna_compile *c, nir_variable *var, struct etna_inst_src src)
 {
-   c->output_reg[index] = src.reg;
-}
-
-static void
-etna_emit_load_ubo(struct etna_compile *c, struct etna_inst_dst dst,
-                   struct etna_inst_src src, struct etna_inst_src base)
-{
-   /* convert float offset back to integer */
-   if (c->specs->halti < 2) {
-      emit_inst(c, &(struct etna_inst) {
-         .opcode = INST_OPCODE_F2I,
-         .type = INST_TYPE_U32,
-         .dst = dst,
-         .src[0] = src,
-      });
-
-      emit_inst(c, &(struct etna_inst) {
-         .opcode = INST_OPCODE_LOAD,
-         .type = INST_TYPE_U32,
-         .dst = dst,
-         .src[0] = {
-            .use = 1,
-            .rgroup = INST_RGROUP_TEMP,
-            .reg = dst.reg,
-            .swiz = INST_SWIZ_BROADCAST(ffs(dst.write_mask) - 1)
-         },
-         .src[1] = base,
-      });
+   struct etna_shader_io_file *sf = &c->variant->outfile;
 
+   if (is_fs(c)) {
+      switch (var->data.location) {
+      case FRAG_RESULT_COLOR:
+      case FRAG_RESULT_DATA0: /* DATA0 is used by gallium shaders for color */
+         c->variant->ps_color_out_reg = src.reg;
+         break;
+      case FRAG_RESULT_DEPTH:
+         c->variant->ps_depth_out_reg = src.reg;
+         break;
+      default:
+         unreachable("Unsupported fs output");
+      }
       return;
    }
 
-   emit_inst(c, &(struct etna_inst) {
-      .opcode = INST_OPCODE_LOAD,
-      .type = INST_TYPE_U32,
-      .dst = dst,
-      .src[0] = src,
-      .src[1] = base,
-   });
+   switch (var->data.location) {
+   case VARYING_SLOT_POS:
+      c->variant->vs_pos_out_reg = src.reg;
+      break;
+   case VARYING_SLOT_PSIZ:
+      c->variant->vs_pointsize_out_reg = src.reg;
+      break;
+   default:
+      sf->reg[sf->num_reg].reg = src.reg;
+      sf->reg[sf->num_reg].slot = var->data.location;
+      sf->reg[sf->num_reg].num_components = glsl_get_components(var->type);
+      sf->num_reg++;
+      break;
+   }
 }
 
 #define OPT(nir, pass, ...) ({                             \
@@ -667,6 +521,75 @@ copy_uniform_state_to_shader(struct etna_shader_variant *sobj, uint64_t *consts,
 
 #include "etnaviv_compiler_nir_emit.h"
 
+static bool
+etna_compile_check_limits(struct etna_shader_variant *v)
+{
+   const struct etna_specs *specs = v->shader->specs;
+   int max_uniforms = (v->stage == MESA_SHADER_VERTEX)
+                         ? specs->max_vs_uniforms
+                         : specs->max_ps_uniforms;
+
+   if (!specs->has_icache && v->needs_icache) {
+      DBG("Number of instructions (%d) exceeds maximum %d", v->code_size / 4,
+          specs->max_instructions);
+      return false;
+   }
+
+   if (v->num_temps > specs->max_registers) {
+      DBG("Number of registers (%d) exceeds maximum %d", v->num_temps,
+          specs->max_registers);
+      return false;
+   }
+
+   if (v->uniforms.imm_count / 4 > max_uniforms) {
+      DBG("Number of uniforms (%d) exceeds maximum %d",
+          v->uniforms.imm_count / 4, max_uniforms);
+      return false;
+   }
+
+   return true;
+}
+
+static void
+fill_vs_mystery(struct etna_shader_variant *v)
+{
+   const struct etna_specs *specs = v->shader->specs;
+
+   v->input_count_unk8 = DIV_ROUND_UP(v->infile.num_reg + 4, 16); /* XXX what is this */
+
+   /* fill in "mystery meat" load balancing value. This value determines how
+    * work is scheduled between VS and PS
+    * in the unified shader architecture. More precisely, it is determined from
+    * the number of VS outputs, as well as chip-specific
+    * vertex output buffer size, vertex cache size, and the number of shader
+    * cores.
+    *
+    * XXX this is a conservative estimate, the "optimal" value is only known for
+    * sure at link time because some
+    * outputs may be unused and thus unmapped. Then again, in the general use
+    * case with GLSL the vertex and fragment
+    * shaders are linked already before submitting to Gallium, thus all outputs
+    * are used.
+    *
+    * note: TGSI compiler counts all outputs (including position and pointsize), here
+    * v->outfile.num_reg only counts varyings, +1 to compensate for the position output
+    * TODO: might have a problem that we don't count pointsize when it is used
+    */
+
+   int half_out = v->outfile.num_reg / 2 + 1;
+   assert(half_out);
+
+   uint32_t b = ((20480 / (specs->vertex_output_buffer_size -
+                           2 * half_out * specs->vertex_cache_size)) +
+                 9) /
+                10;
+   uint32_t a = (b + 256 / (specs->shader_core_count * half_out)) / 2;
+   v->vs_load_balancing = VIVS_VS_LOAD_BALANCING_A(MIN2(a, 255)) |
+                             VIVS_VS_LOAD_BALANCING_B(MIN2(b, 255)) |
+                             VIVS_VS_LOAD_BALANCING_C(0x3f) |
+                             VIVS_VS_LOAD_BALANCING_D(0x0f);
+}
+
 bool
 etna_compile_shader_nir(struct etna_shader_variant *v)
 {
@@ -715,7 +638,7 @@ etna_compile_shader_nir(struct etna_shader_variant *v)
       assert(sf->num_reg == count);
    }
 
-   NIR_PASS_V(s, nir_lower_io, nir_var_all, etna_glsl_type_size,
+   NIR_PASS_V(s, nir_lower_io, ~nir_var_shader_out, etna_glsl_type_size,
             (nir_lower_io_options)0);
 
    OPT_V(s, nir_lower_regs_to_ssa);
@@ -728,6 +651,9 @@ etna_compile_shader_nir(struct etna_shader_variant *v)
 
    OPT_V(s, etna_lower_io, v);
 
+   if (v->shader->specs->vs_need_z_div)
+      NIR_PASS_V(s, nir_lower_clip_halfz);
+
    /* lower pre-halti2 to float (halti0 has integers, but only scalar..) */
    if (c->specs->halti < 2) {
       /* use opt_algebraic between int_to_float and boot_to_float because
@@ -737,7 +663,7 @@ etna_compile_shader_nir(struct etna_shader_variant *v)
       OPT_V(s, nir_opt_algebraic);
       OPT_V(s, nir_lower_bool_to_float);
    } else {
-      OPT_V(s, nir_lower_idiv);
+      OPT_V(s, nir_lower_idiv, nir_lower_idiv_fast);
       OPT_V(s, nir_lower_bool_to_int32);
    }
 
@@ -749,7 +675,7 @@ etna_compile_shader_nir(struct etna_shader_variant *v)
    while( OPT(s, nir_opt_vectorize) );
    OPT_V(s, nir_lower_alu_to_scalar, etna_alu_to_scalar_filter_cb, specs);
 
-   NIR_PASS_V(s, nir_remove_dead_variables, nir_var_function_temp);
+   NIR_PASS_V(s, nir_remove_dead_variables, nir_var_function_temp, NULL);
    NIR_PASS_V(s, nir_opt_algebraic_late);
 
    NIR_PASS_V(s, nir_move_vec_src_uses_to_dest);
@@ -762,28 +688,16 @@ etna_compile_shader_nir(struct etna_shader_variant *v)
 
    NIR_PASS_V(s, nir_opt_dce);
 
-   NIR_PASS_V(s, etna_lower_alu, c);
+   NIR_PASS_V(s, etna_lower_alu, c->specs->has_new_transcendentals);
 
    if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS))
       nir_print_shader(s, stdout);
 
-   uint64_t consts[ETNA_MAX_IMM] = {};
-
    unsigned block_ptr[nir_shader_get_entrypoint(s)->num_blocks];
    c->block_ptr = block_ptr;
-   struct emit_options options = {
-      .max_temps = ETNA_MAX_TEMPS,
-      .max_consts = ETNA_MAX_IMM / 4,
-      .id_reg = sf->num_reg,
-      .single_const_src = c->specs->halti < 5,
-      .etna_new_transcendentals = c->specs->has_new_transcendentals,
-      .no_integers = c->specs->halti < 2,
-      .user = c,
-      .consts = consts,
-   };
 
    unsigned num_consts;
-   ASSERTED bool ok = emit_shader(c->nir, &options, &v->num_temps, &num_consts);
+   ASSERTED bool ok = emit_shader(c, &v->num_temps, &num_consts);
    assert(ok);
 
    /* empty shader, emit NOP */
@@ -791,7 +705,7 @@ etna_compile_shader_nir(struct etna_shader_variant *v)
       emit_inst(c, &(struct etna_inst) { .opcode = INST_OPCODE_NOP });
 
    /* assemble instructions, fixing up labels */
-   uint32_t *code = MALLOC(c->inst_ptr * 16 + 1024);
+   uint32_t *code = MALLOC(c->inst_ptr * 16);
    for (unsigned i = 0; i < c->inst_ptr; i++) {
       struct etna_inst *inst = &c->code[i];
       if (inst->opcode == INST_OPCODE_BRANCH)
@@ -805,90 +719,19 @@ etna_compile_shader_nir(struct etna_shader_variant *v)
    v->code = code;
    v->needs_icache = c->inst_ptr > specs->max_instructions;
 
-   copy_uniform_state_to_shader(v, consts, num_consts);
+   copy_uniform_state_to_shader(v, c->consts, num_consts);
 
    if (s->info.stage == MESA_SHADER_FRAGMENT) {
       v->input_count_unk8 = 31; /* XXX what is this */
-
-      nir_foreach_variable(var, &s->outputs) {
-         unsigned reg = c->output_reg[var->data.driver_location];
-         switch (var->data.location) {
-         case FRAG_RESULT_COLOR:
-         case FRAG_RESULT_DATA0: /* DATA0 is used by gallium shaders for color */
-            v->ps_color_out_reg = reg;
-            break;
-         case FRAG_RESULT_DEPTH:
-            v->ps_depth_out_reg = reg;
-            break;
-         default:
-            compile_error(c, "Unsupported fs output %s\n", gl_frag_result_name(var->data.location));
-         }
-      }
       assert(v->ps_depth_out_reg <= 0);
-      v->outfile.num_reg = 0;
-      ralloc_free(c->nir);
-      FREE(c);
-      return true;
-   }
-
-   v->input_count_unk8 = DIV_ROUND_UP(v->infile.num_reg + 4, 16); /* XXX what is this */
-
-   sf = &v->outfile;
-   sf->num_reg = 0;
-   nir_foreach_variable(var, &s->outputs) {
-      unsigned native = c->output_reg[var->data.driver_location];
-
-      if (var->data.location == VARYING_SLOT_POS) {
-         v->vs_pos_out_reg = native;
-         continue;
-      }
-
-      if (var->data.location == VARYING_SLOT_PSIZ) {
-         v->vs_pointsize_out_reg = native;
-         continue;
-      }
-
-      sf->reg[sf->num_reg].reg = native;
-      sf->reg[sf->num_reg].slot = var->data.location;
-      sf->reg[sf->num_reg].num_components = glsl_get_components(var->type);
-      sf->num_reg++;
+   } else {
+      fill_vs_mystery(v);
    }
 
-   /* fill in "mystery meat" load balancing value. This value determines how
-    * work is scheduled between VS and PS
-    * in the unified shader architecture. More precisely, it is determined from
-    * the number of VS outputs, as well as chip-specific
-    * vertex output buffer size, vertex cache size, and the number of shader
-    * cores.
-    *
-    * XXX this is a conservative estimate, the "optimal" value is only known for
-    * sure at link time because some
-    * outputs may be unused and thus unmapped. Then again, in the general use
-    * case with GLSL the vertex and fragment
-    * shaders are linked already before submitting to Gallium, thus all outputs
-    * are used.
-    *
-    * note: TGSI compiler counts all outputs (including position and pointsize), here
-    * v->outfile.num_reg only counts varyings, +1 to compensate for the position output
-    * TODO: might have a problem that we don't count pointsize when it is used
-    */
-
-   int half_out = v->outfile.num_reg / 2 + 1;
-   assert(half_out);
-
-   uint32_t b = ((20480 / (specs->vertex_output_buffer_size -
-                           2 * half_out * specs->vertex_cache_size)) +
-                 9) /
-                10;
-   uint32_t a = (b + 256 / (specs->shader_core_count * half_out)) / 2;
-   v->vs_load_balancing = VIVS_VS_LOAD_BALANCING_A(MIN2(a, 255)) |
-                             VIVS_VS_LOAD_BALANCING_B(MIN2(b, 255)) |
-                             VIVS_VS_LOAD_BALANCING_C(0x3f) |
-                             VIVS_VS_LOAD_BALANCING_D(0x0f);
-
+   bool result = etna_compile_check_limits(v);
    ralloc_free(c->nir);
    FREE(c);
-   return true;
+   return result;
 }
 
 void