etnaviv: enable texture upload memory throttling

[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_context.c

diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.c b/src/gallium/drivers/etnaviv/etnaviv_context.c
index 367f31f2e9b509db8b176d7953dd2003727be43c..df8c00c55563618f079a6ca9e4a31ec2d598b76f 100644 (file)
--- a/src/gallium/drivers/etnaviv/etnaviv_context.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.c
@@ -61,7 +61,6 @@ static void
 etna_context_destroy(struct pipe_context *pctx)
 {
    struct etna_context *ctx = etna_context(pctx);
-   struct etna_screen *screen = ctx->screen;
 
    mtx_lock(&ctx->lock);
    if (ctx->used_resources_read) {
@@ -227,7 +226,7 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
    if (info->index_size) {
       indexbuf = info->has_user_indices ? NULL : info->index.resource;
       if (info->has_user_indices &&
-          !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset)) {
+          !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset, 4)) {
          BUG("Index buffer upload failed.");
          return;
       }
@@ -256,7 +255,7 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
    };
 
    if (pfb->cbufs[0])
-      key.frag_rb_swap = !!translate_rs_format_rb_swap(pfb->cbufs[0]->format);
+      key.frag_rb_swap = !!translate_pe_format_rb_swap(pfb->cbufs[0]->format);
 
    if (!etna_get_vs(ctx, key) || !etna_get_fs(ctx, key)) {
       BUG("compiled shaders are not okay");
@@ -289,8 +288,10 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
    }
 
    /* Mark constant buffers as being read */
-   resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].buffer);
-   resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].buffer);
+   for (unsigned i = 0; i < ETNA_MAX_CONST_BUF; i++) {
+      resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX][i].buffer);
+      resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT][i].buffer);
+   }
 
    /* Mark VBOs as being read */
    foreach_bit(i, ctx->vertex_buffer.enabled_mask) {
@@ -328,7 +329,7 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
 
    if (ctx->specs.halti >= 2) {
       /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */
-      etna_draw_instanced(ctx->stream, info->index_size, draw_mode, 1,
+      etna_draw_instanced(ctx->stream, info->index_size, draw_mode, info->instance_count,
          info->count, info->index_size ? info->index_bias : info->start);
    } else {
       if (info->index_size)
@@ -356,7 +357,8 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
       pipe_resource_reference(&indexbuf, NULL);
 }
 
-static void etna_reset_gpu_state(struct etna_context *ctx)
+static void
+etna_reset_gpu_state(struct etna_context *ctx)
 {
    struct etna_cmd_stream *stream = ctx->stream;
 
@@ -371,7 +373,6 @@ static void etna_reset_gpu_state(struct etna_context *ctx)
    etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
    etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x00000000);
    etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x00007000);
-   etna_set_state(stream, VIVS_PE_STENCIL_CONFIG_EXT2, 0x00000000);
    etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000);
 
    /* There is no HALTI0 specific state */
@@ -434,7 +435,6 @@ etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
            enum pipe_flush_flags flags)
 {
    struct etna_context *ctx = etna_context(pctx);
-   struct etna_screen *screen = ctx->screen;
    int out_fence_fd = -1;
 
    mtx_lock(&ctx->lock);
@@ -461,6 +461,10 @@ etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
 
       _mesa_set_remove_key(rsc->pending_ctx, ctx);
 
+      /* if resource has no pending ctx's reset its status */
+      if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
+         rsc->status &= ~ETNA_PENDING_READ;
+
       pipe_resource_reference(&referenced, NULL);
    }
    _mesa_set_clear(ctx->used_resources_read, NULL);
@@ -471,6 +475,10 @@ etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
 
       _mesa_set_remove_key(rsc->pending_ctx, ctx);
 
+      /* if resource has no pending ctx's reset its status */
+      if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
+         rsc->status &= ~ETNA_PENDING_WRITE;
+
       pipe_resource_reference(&referenced, NULL);
    }
    _mesa_set_clear(ctx->used_resources_write, NULL);