#include "etnaviv_screen.h"
#include "etnaviv_translate.h"
+#include "util/hash_table.h"
#include "util/u_inlines.h"
#include "util/u_memory.h"
-#include <drm_fourcc.h>
-
-#ifndef DRM_FORMAT_MOD_INVALID
-#define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
-#endif
+#include "drm-uapi/drm_fourcc.h"
static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
{
struct etna_resource *rsc)
{
struct etna_screen *screen = etna_screen(pscreen);
- size_t rt_ts_size, ts_layer_stride, pixels;
+ size_t rt_ts_size, ts_layer_stride;
assert(!rsc->ts_bo);
- /* TS only for level 0 -- XXX is this formula correct? */
- pixels = rsc->levels[0].layer_stride / util_format_get_blocksize(rsc->base.format);
- ts_layer_stride = align(pixels * screen->specs.bits_per_tile / 0x80,
+ ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
+ 64 * 8 / screen->specs.bits_per_tile),
0x100 * screen->specs.pixel_pipes);
rt_ts_size = ts_layer_stride * rsc->base.array_size;
if (rt_ts_size == 0)
return size;
}
+/* Is rs alignment needed? */
+static bool is_rs_align(struct etna_screen *screen,
+ const struct pipe_resource *tmpl)
+{
+ return screen->specs.use_blt ? false : (
+ VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
+ !etna_resource_sampler_only(tmpl));
+}
+
/* Create a new resource object, using the given template info */
struct pipe_resource *
etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
+ enum etna_resource_addressing_mode mode, uint64_t modifier,
const struct pipe_resource *templat)
{
struct etna_screen *screen = etna_screen(pscreen);
return NULL;
}
- /* If we have the TEXTURE_HALIGN feature, we can always align to the
- * resolve engine's width. If not, we must not align resources used
- * only for textures. */
- bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
- !etna_resource_sampler_only(templat);
-
/* Determine needed padding (alignment of height/width) */
unsigned paddingX = 0, paddingY = 0;
unsigned halign = TEXTURE_HALIGN_FOUR;
- etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align, &paddingX,
- &paddingY, &halign);
- assert(paddingX && paddingY);
+ if (!util_format_is_compressed(templat->format)) {
+ /* If we have the TEXTURE_HALIGN feature, we can always align to the
+ * resolve engine's width. If not, we must not align resources used
+ * only for textures. If this GPU uses the BLT engine, never do RS align.
+ */
+ etna_layout_multiple(layout, screen->specs.pixel_pipes,
+ is_rs_align (screen, templat),
+ &paddingX, &paddingY, &halign);
+ assert(paddingX && paddingY);
+ } else {
+ /* Compressed textures are padded to their block size, but we don't have
+ * to do anything special for that. */
+ paddingX = 1;
+ paddingY = 1;
+ }
- if (templat->target != PIPE_BUFFER)
+ if (!screen->specs.use_blt && templat->target != PIPE_BUFFER)
etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
- if (templat->bind & PIPE_BIND_SCANOUT) {
+ if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
struct pipe_resource scanout_templat = *templat;
struct renderonly_scanout *scanout;
struct winsys_handle handle;
/* pad scanout buffer size to be compatible with the RS */
- etna_adjust_rs_align(screen->specs.pixel_pipes,
- &scanout_templat.width0, &scanout_templat.height0);
+ if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR)
+ etna_adjust_rs_align(screen->specs.pixel_pipes, &paddingX, &paddingY);
+
+ scanout_templat.width0 = align(scanout_templat.width0, paddingX);
+ scanout_templat.height0 = align(scanout_templat.height0, paddingY);
scanout = renderonly_scanout_for_resource(&scanout_templat,
screen->ro, &handle);
if (!scanout)
return NULL;
- assert(handle.type == DRM_API_HANDLE_TYPE_FD);
+ assert(handle.type == WINSYS_HANDLE_TYPE_FD);
+ handle.modifier = modifier;
rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
&handle,
- PIPE_HANDLE_USAGE_WRITE));
+ PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
close(handle.handle);
if (!rsc)
return NULL;
rsc->base.nr_samples = nr_samples;
rsc->layout = layout;
rsc->halign = halign;
+ rsc->addressing_mode = mode;
pipe_reference_init(&rsc->base.reference, 1);
- list_inithead(&rsc->list);
size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
memset(map, 0, size);
}
+ rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
+ if (!rsc->pending_ctx)
+ goto free_rsc;
+
return &rsc->base;
free_rsc:
{
struct etna_screen *screen = etna_screen(pscreen);
- /* Figure out what tiling to use -- for now, assume that texture cannot be linear.
- * there is a capability LINEAR_TEXTURE_SUPPORT (supported on gc880 and
- * gc2000 at least), but not sure how it works.
+ /* Figure out what tiling and address mode to use -- for now, assume that
+ * texture cannot be linear. there is a capability LINEAR_TEXTURE_SUPPORT
+ * (supported on gc880 and gc2000 at least), but not sure how it works.
* Buffers always have LINEAR layout.
*/
unsigned layout = ETNA_LAYOUT_LINEAR;
+ enum etna_resource_addressing_mode mode = ETNA_ADDRESSING_MODE_TILED;
+
if (etna_resource_sampler_only(templat)) {
/* The buffer is only used for texturing, so create something
* directly compatible with the sampler. Such a buffer can
if (templat->target == PIPE_TEXTURE_3D)
layout = ETNA_LAYOUT_LINEAR;
- return etna_resource_alloc(pscreen, layout, templat);
+ /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
+ return etna_resource_alloc(pscreen, layout, mode, DRM_FORMAT_MOD_LINEAR, templat);
+}
+
+enum modifier_priority {
+ MODIFIER_PRIORITY_INVALID = 0,
+ MODIFIER_PRIORITY_LINEAR,
+ MODIFIER_PRIORITY_SPLIT_TILED,
+ MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
+ MODIFIER_PRIORITY_TILED,
+ MODIFIER_PRIORITY_SUPER_TILED,
+};
+
+const uint64_t priority_to_modifier[] = {
+ [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
+ [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
+ [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
+ [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
+ [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
+ [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
+};
+
+static uint64_t
+select_best_modifier(const struct etna_screen * screen,
+ const uint64_t *modifiers, const unsigned count)
+{
+ enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
+
+ for (int i = 0; i < count; i++) {
+ switch (modifiers[i]) {
+ case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
+ if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
+ !screen->specs.can_supertile)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
+ break;
+ case DRM_FORMAT_MOD_VIVANTE_TILED:
+ if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
+ break;
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
+ if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
+ break;
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
+ if (screen->specs.pixel_pipes < 2)
+ break;
+ prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
+ break;
+ case DRM_FORMAT_MOD_LINEAR:
+ prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
+ break;
+ case DRM_FORMAT_MOD_INVALID:
+ default:
+ break;
+ }
+ }
+
+ return priority_to_modifier[prio];
+}
+
+static struct pipe_resource *
+etna_resource_create_modifiers(struct pipe_screen *pscreen,
+ const struct pipe_resource *templat,
+ const uint64_t *modifiers, int count)
+{
+ struct etna_screen *screen = etna_screen(pscreen);
+ struct pipe_resource tmpl = *templat;
+ uint64_t modifier = select_best_modifier(screen, modifiers, count);
+
+ if (modifier == DRM_FORMAT_MOD_INVALID)
+ return NULL;
+
+ /*
+ * We currently assume that all buffers allocated through this interface
+ * should be scanout enabled.
+ */
+ tmpl.bind |= PIPE_BIND_SCANOUT;
+
+ return etna_resource_alloc(pscreen, modifier_to_layout(modifier),
+ ETNA_ADDRESSING_MODE_TILED, modifier, &tmpl);
}
static void
static void
etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
{
+ struct etna_screen *screen = etna_screen(pscreen);
struct etna_resource *rsc = etna_resource(prsc);
+ mtx_lock(&screen->lock);
+ _mesa_set_remove_key(screen->used_resources, rsc);
+ _mesa_set_destroy(rsc->pending_ctx, NULL);
+ mtx_unlock(&screen->lock);
+
if (rsc->bo)
etna_bo_del(rsc->bo);
if (rsc->scanout)
renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
- list_delinit(&rsc->list);
-
pipe_resource_reference(&rsc->texture, NULL);
pipe_resource_reference(&rsc->external, NULL);
+ for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
+ FREE(rsc->levels[i].patch_offsets);
+
FREE(rsc);
}
*prsc = *tmpl;
pipe_reference_init(&prsc->reference, 1);
- list_inithead(&rsc->list);
prsc->screen = pscreen;
rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
rsc->seqno = 1;
rsc->layout = modifier_to_layout(handle->modifier);
rsc->halign = TEXTURE_HALIGN_FOUR;
+ rsc->addressing_mode = ETNA_ADDRESSING_MODE_TILED;
level->width = tmpl->width0;
/* Determine padding of the imported resource. */
unsigned paddingX = 0, paddingY = 0;
etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
- VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN),
+ is_rs_align(screen, tmpl),
&paddingX, &paddingY, &rsc->halign);
- etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
+ if (!screen->specs.use_blt)
+ etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
level->padded_width = align(level->width, paddingX);
level->padded_height = align(level->height, paddingY);
level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
level->padded_height);
+ level->size = level->layer_stride;
/* The DDX must give us a BO which conforms to our padding size.
* The stride of the BO must be greater or equal to our padded
* stride. The size of the BO must accomodate the padded height. */
if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
- BUG("BO stride is too small for RS engine width padding");
+ BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
+ level->stride, util_format_get_stride(tmpl->format, level->padded_width),
+ util_format_name(tmpl->format));
goto fail;
}
if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
- BUG("BO size is too small for RS engine height padding");
+ BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
+ etna_bo_size(rsc->bo), level->stride * level->padded_height,
+ util_format_name(tmpl->format));
goto fail;
}
+ rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
+ if (!rsc->pending_ctx)
+ goto fail;
+
if (rsc->layout == ETNA_LAYOUT_LINEAR) {
/*
* Both sampler and pixel pipes can't handle linear, create a compatible
rsc = etna_resource(rsc->external);
handle->stride = rsc->levels[0].stride;
+ handle->offset = rsc->levels[0].offset;
handle->modifier = layout_to_modifier(rsc->layout);
- if (handle->type == DRM_API_HANDLE_TYPE_SHARED) {
+ if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
- } else if (handle->type == DRM_API_HANDLE_TYPE_KMS) {
+ } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
if (renderonly_get_handle(scanout, handle)) {
return TRUE;
} else {
handle->handle = etna_bo_handle(rsc->bo);
return TRUE;
}
- } else if (handle->type == DRM_API_HANDLE_TYPE_FD) {
+ } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
handle->handle = etna_bo_dmabuf(rsc->bo);
return TRUE;
} else {
etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
enum etna_resource_status status)
{
+ struct etna_screen *screen = ctx->screen;
struct etna_resource *rsc;
if (!prsc)
return;
rsc = etna_resource(prsc);
+
+ mtx_lock(&screen->lock);
+
+ /*
+ * if we are pending read or write by any other context or
+ * if reading a resource pending a write, then
+ * flush all the contexts to maintain coherency
+ */
+ if (((status & ETNA_PENDING_WRITE) && rsc->status) ||
+ ((status & ETNA_PENDING_READ) && (rsc->status & ETNA_PENDING_WRITE))) {
+ set_foreach(rsc->pending_ctx, entry) {
+ struct etna_context *extctx = (struct etna_context *)entry->key;
+ struct pipe_context *pctx = &extctx->base;
+
+ if (extctx == ctx)
+ continue;
+
+ pctx->flush(pctx, NULL, 0);
+ /* It's safe to clear the status here. If we need to flush it means
+ * either another context had the resource in exclusive (write) use,
+ * or we transition the resource to exclusive use in our context.
+ * In both cases the new status accurately reflects the resource use
+ * after the flush.
+ */
+ rsc->status = 0;
+ }
+ }
+
rsc->status |= status;
- /* TODO resources can actually be shared across contexts,
- * so I'm not sure a single list-head will do the trick? */
- debug_assert((rsc->pending_ctx == ctx) || !rsc->pending_ctx);
- list_delinit(&rsc->list);
- list_addtail(&rsc->list, &ctx->used_resources);
- rsc->pending_ctx = ctx;
+ _mesa_set_add(screen->used_resources, rsc);
+ _mesa_set_add(rsc->pending_ctx, ctx);
+
+ mtx_unlock(&screen->lock);
+}
+
+bool
+etna_resource_has_valid_ts(struct etna_resource *rsc)
+{
+ if (!rsc->ts_bo)
+ return false;
+
+ for (int level = 0; level <= rsc->base.last_level; level++)
+ if (rsc->levels[level].ts_valid)
+ return true;
+
+ return false;
}
void
{
pscreen->can_create_resource = etna_screen_can_create_resource;
pscreen->resource_create = etna_resource_create;
+ pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
pscreen->resource_from_handle = etna_resource_from_handle;
pscreen->resource_get_handle = etna_resource_get_handle;
pscreen->resource_changed = etna_resource_changed;