radeonsi: fix is_oneway_access_only for image stores

[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_resource.c

diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.c b/src/gallium/drivers/etnaviv/etnaviv_resource.c
index 1fb73c493944dfd84804d5a3d209b17b5c553c13..c00912880309c30b5553f7fe20a4b8d481170ce9 100644 (file)
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.c
@@ -176,6 +176,15 @@ setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
    return size;
 }
 
+/* Is rs alignment needed? */
+static bool is_rs_align(struct etna_screen *screen,
+                        const struct pipe_resource *tmpl)
+{
+   return screen->specs.use_blt ? false : (
+      VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
+      !etna_resource_sampler_only(tmpl));
+}
+
 /* Create a new resource object, using the given template info */
 struct pipe_resource *
 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
@@ -215,11 +224,11 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
    if (!util_format_is_compressed(templat->format)) {
       /* If we have the TEXTURE_HALIGN feature, we can always align to the
        * resolve engine's width.  If not, we must not align resources used
-       * only for textures. */
-      bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
-                      !etna_resource_sampler_only(templat);
-      etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align, &paddingX,
-                           &paddingY, &halign);
+       * only for textures. If this GPU uses the BLT engine, never do RS align.
+       */
+      etna_layout_multiple(layout, screen->specs.pixel_pipes,
+                           is_rs_align (screen, templat),
+                           &paddingX, &paddingY, &halign);
       assert(paddingX && paddingY);
    } else {
       /* Compressed textures are padded to their block size, but we don't have
@@ -228,7 +237,7 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
       paddingY = 1;
    }
 
-   if (templat->target != PIPE_BUFFER)
+   if (!screen->specs.use_blt && templat->target != PIPE_BUFFER)
       etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
 
    if (templat->bind & PIPE_BIND_SCANOUT) {
@@ -237,7 +246,7 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
       struct winsys_handle handle;
 
       /* pad scanout buffer size to be compatible with the RS */
-      if (modifier == DRM_FORMAT_MOD_LINEAR)
+      if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR)
          etna_adjust_rs_align(screen->specs.pixel_pipes, &paddingX, &paddingY);
 
       scanout_templat.width0 = align(scanout_templat.width0, paddingX);
@@ -248,11 +257,11 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
       if (!scanout)
          return NULL;
 
-      assert(handle.type == DRM_API_HANDLE_TYPE_FD);
+      assert(handle.type == WINSYS_HANDLE_TYPE_FD);
       handle.modifier = modifier;
       rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
                                                         &handle,
-                                                        PIPE_HANDLE_USAGE_WRITE));
+                                                        PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
       close(handle.handle);
       if (!rsc)
          return NULL;
@@ -517,25 +526,31 @@ etna_resource_from_handle(struct pipe_screen *pscreen,
    /* Determine padding of the imported resource. */
    unsigned paddingX = 0, paddingY = 0;
    etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
-                        VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN),
+                        is_rs_align(screen, tmpl),
                         &paddingX, &paddingY, &rsc->halign);
 
-   etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
+   if (!screen->specs.use_blt)
+      etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
    level->padded_width = align(level->width, paddingX);
    level->padded_height = align(level->height, paddingY);
 
    level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
                                                                   level->padded_height);
+   level->size = level->layer_stride;
 
    /* The DDX must give us a BO which conforms to our padding size.
     * The stride of the BO must be greater or equal to our padded
     * stride. The size of the BO must accomodate the padded height. */
    if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
-      BUG("BO stride is too small for RS engine width padding");
+      BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
+          level->stride, util_format_get_stride(tmpl->format, level->padded_width),
+          util_format_name(tmpl->format));
       goto fail;
    }
    if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
-      BUG("BO size is too small for RS engine height padding");
+      BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
+          etna_bo_size(rsc->bo), level->stride * level->padded_height,
+          util_format_name(tmpl->format));
       goto fail;
    }
 
@@ -592,16 +607,16 @@ etna_resource_get_handle(struct pipe_screen *pscreen,
    handle->stride = rsc->levels[0].stride;
    handle->modifier = layout_to_modifier(rsc->layout);
 
-   if (handle->type == DRM_API_HANDLE_TYPE_SHARED) {
+   if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
       return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
-   } else if (handle->type == DRM_API_HANDLE_TYPE_KMS) {
+   } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
       if (renderonly_get_handle(scanout, handle)) {
          return TRUE;
       } else {
          handle->handle = etna_bo_handle(rsc->bo);
          return TRUE;
       }
-   } else if (handle->type == DRM_API_HANDLE_TYPE_FD) {
+   } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
       handle->handle = etna_bo_dmabuf(rsc->bo);
       return TRUE;
    } else {