struct etna_screen *priv = etna_screen(pscreen);
static char buffer[128];
- util_snprintf(buffer, sizeof(buffer), "Vivante GC%x rev %04x", priv->model,
- priv->revision);
+ snprintf(buffer, sizeof(buffer), "Vivante GC%x rev %04x", priv->model,
+ priv->revision);
return buffer;
}
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
- case PIPE_CAP_SM3:
+ case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+ case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+ case PIPE_CAP_VERTEX_SHADER_SATURATE:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
* must have MSAA'able format. */
if (sample_count > 1) {
if (translate_samples_to_xyscale(sample_count, NULL, NULL, NULL) &&
- translate_msaa_format(format) != ETNA_NO_MATCH) {
+ translate_ts_format(format) != ETNA_NO_MATCH) {
allowed |= PIPE_BIND_RENDER_TARGET;
}
} else {
screen->specs.bits_per_tile =
VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 2 : 4;
screen->specs.ts_clear_value =
- VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555
- : 0x11111111;
+ VIV_FEATURE(screen, chipMinorFeatures5, BLT_ENGINE) ? 0xffffffff :
+ VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555 :
+ 0x11111111;
+
/* vertex and fragment samplers live in one address space */
screen->specs.vertex_sampler_offset = 8;
VIV_FEATURE(screen, chipMinorFeatures3, HAS_FAST_TRANSCENDENTALS);
screen->specs.has_halti2_instructions =
VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
+ screen->specs.v4_compression =
+ VIV_FEATURE(screen, chipMinorFeatures6, V4_COMPRESSION);
if (screen->specs.halti >= 5) {
/* GC7000 - this core must load shaders from memory. */
}
screen->features[6] = val;
+ if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_7, &val)) {
+ DBG("could not get ETNA_GPU_FEATURES_7");
+ goto fail;
+ }
+ screen->features[7] = val;
+
if (!etna_get_specs(screen))
goto fail;