{"draw_stall", ETNA_DBG_DRAW_STALL, "Stall FE/PE after each rendered primitive"},
{"shaderdb", ETNA_DBG_SHADERDB, "Enable shaderdb output"},
{"no_singlebuffer",ETNA_DBG_NO_SINGLEBUF, "Disable single buffer feature"},
+ {"nir", ETNA_DBG_NIR, "use new NIR compiler"},
DEBUG_NAMED_VALUE_END
};
struct etna_screen *priv = etna_screen(pscreen);
static char buffer[128];
- util_snprintf(buffer, sizeof(buffer), "Vivante GC%x rev %04x", priv->model,
- priv->revision);
+ snprintf(buffer, sizeof(buffer), "Vivante GC%x rev %04x", priv->model,
+ priv->revision);
return buffer;
}
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
- case PIPE_CAP_SM3:
+ case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+ case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+ case PIPE_CAP_VERTEX_SHADER_SATURATE:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
return 1;
case PIPE_CAP_NATIVE_FENCE_FD:
return screen->drm_version >= ETNA_DRM_VERSION_FENCE_FD;
+ case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
+ case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: /* note: not integer */
+ return DBG_ENABLED(ETNA_DBG_NIR);
+ case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
+ return 0;
/* Memory */
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
/* Texturing. */
case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
+ case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: /* TODO: verify */
return screen->specs.max_texture_size;
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
+ case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
{
int log2_max_tex_size = util_last_bit(screen->specs.max_texture_size);
assert(log2_max_tex_size > 0);
return log2_max_tex_size;
}
- case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: /* 3D textures not supported - fake it */
- return 5;
+
case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_MIN_TEXEL_OFFSET:
return -8;
? screen->specs.fragment_sampler_count
: screen->specs.vertex_sampler_count;
case PIPE_SHADER_CAP_PREFERRED_IR:
- return PIPE_SHADER_IR_TGSI;
+ return DBG_ENABLED(ETNA_DBG_NIR) ? PIPE_SHADER_IR_NIR : PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
return 4096;
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
}
static bool
-gpu_supports_texure_format(struct etna_screen *screen, uint32_t fmt,
- enum pipe_format format)
+gpu_supports_texture_target(struct etna_screen *screen,
+ enum pipe_texture_target target)
+{
+ if (target == PIPE_TEXTURE_CUBE_ARRAY)
+ return false;
+
+ /* pre-halti has no array/3D */
+ if (screen->specs.halti < 0 &&
+ (target == PIPE_TEXTURE_1D_ARRAY ||
+ target == PIPE_TEXTURE_2D_ARRAY ||
+ target == PIPE_TEXTURE_3D))
+ return false;
+
+ return true;
+}
+
+static bool
+gpu_supports_texture_format(struct etna_screen *screen, uint32_t fmt,
+ enum pipe_format format)
{
bool supported = true;
return true;
}
-static boolean
+static bool
etna_screen_is_format_supported(struct pipe_screen *pscreen,
enum pipe_format format,
enum pipe_texture_target target,
struct etna_screen *screen = etna_screen(pscreen);
unsigned allowed = 0;
- if (target != PIPE_BUFFER &&
- target != PIPE_TEXTURE_1D &&
- target != PIPE_TEXTURE_2D &&
- target != PIPE_TEXTURE_3D &&
- target != PIPE_TEXTURE_CUBE &&
- target != PIPE_TEXTURE_RECT)
- return FALSE;
+ if (!gpu_supports_texture_target(screen, target))
+ return false;
if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
return false;
* must have MSAA'able format. */
if (sample_count > 1) {
if (translate_samples_to_xyscale(sample_count, NULL, NULL, NULL) &&
- translate_msaa_format(format) != ETNA_NO_MATCH) {
+ translate_ts_format(format) != ETNA_NO_MATCH) {
allowed |= PIPE_BIND_RENDER_TARGET;
}
} else {
if (usage & PIPE_BIND_SAMPLER_VIEW) {
uint32_t fmt = translate_texture_format(format);
- if (!gpu_supports_texure_format(screen, fmt, format))
+ if (!gpu_supports_texture_format(screen, fmt, format))
fmt = ETNA_NO_MATCH;
if (sample_count < 2 && fmt != ETNA_NO_MATCH)
*count = num_modifiers;
}
-static boolean
+static bool
etna_get_specs(struct etna_screen *screen)
{
uint64_t val;
screen->specs.bits_per_tile =
VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 2 : 4;
screen->specs.ts_clear_value =
- VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555
- : 0x11111111;
+ VIV_FEATURE(screen, chipMinorFeatures5, BLT_ENGINE) ? 0xffffffff :
+ VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555 :
+ 0x11111111;
+
/* vertex and fragment samplers live in one address space */
screen->specs.vertex_sampler_offset = 8;
VIV_FEATURE(screen, chipMinorFeatures3, HAS_FAST_TRANSCENDENTALS);
screen->specs.has_halti2_instructions =
VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
+ screen->specs.v4_compression =
+ VIV_FEATURE(screen, chipMinorFeatures6, V4_COMPRESSION);
if (screen->specs.halti >= 5) {
/* GC7000 - this core must load shaders from memory. */
return bo;
}
+static const void *
+etna_get_compiler_options(struct pipe_screen *pscreen,
+ enum pipe_shader_ir ir, unsigned shader)
+{
+ return &etna_screen(pscreen)->options;
+}
+
struct pipe_screen *
etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu,
struct renderonly *ro)
}
screen->features[6] = val;
+ if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_7, &val)) {
+ DBG("could not get ETNA_GPU_FEATURES_7");
+ goto fail;
+ }
+ screen->features[7] = val;
+
if (!etna_get_specs(screen))
goto fail;
+ screen->options = (nir_shader_compiler_options) {
+ .lower_fpow = true,
+ .lower_sub = true,
+ .lower_ftrunc = true,
+ .fuse_ffma = true,
+ .lower_bitops = true,
+ .lower_all_io_to_temps = true,
+ .vertex_id_zero_based = true,
+ .lower_flrp32 = true,
+ .lower_fmod = true,
+ .lower_vector_cmp = true,
+ .lower_fdph = true,
+ .lower_fdiv = true, /* !screen->specs.has_new_transcendentals */
+ .lower_fsign = !screen->specs.has_sign_floor_ceil,
+ .lower_ffloor = !screen->specs.has_sign_floor_ceil,
+ .lower_fceil = !screen->specs.has_sign_floor_ceil,
+ .lower_fsqrt = !screen->specs.has_sin_cos_sqrt,
+ .lower_sincos = !screen->specs.has_sin_cos_sqrt,
+ };
+
/* apply debug options that disable individual features */
if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z))
screen->features[viv_chipFeatures] |= chipFeatures_NO_EARLY_Z;
pscreen->get_param = etna_screen_get_param;
pscreen->get_paramf = etna_screen_get_paramf;
pscreen->get_shader_param = etna_screen_get_shader_param;
+ pscreen->get_compiler_options = etna_get_compiler_options;
pscreen->get_name = etna_screen_get_name;
pscreen->get_vendor = etna_screen_get_vendor;