Merge remote-tracking branch 'mesa-public/master' into vulkan

[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_context.h

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_context.h b/src/gallium/drivers/freedreno/a3xx/fd3_context.h
index 77e4605e55045030fe9485da216377a80fbadbbf..b4c2ebe570c20cae5fdd454266ab34e3003dd718 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_context.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_context.h
@@ -73,22 +73,6 @@ struct fd3_context {
         */
        struct fd_vertex_state blit_vbuf_state;
 
-
-       /*
-        * Border color layout *appears* to be as arrays of 0x40 byte
-        * elements, with frag shader elements starting at (16 x 0x40).
-        * But at some point I should probably experiment more with
-        * samplers in vertex shaders to be sure.  Unclear about why
-        * there is this offset when there are separate VS and FS base
-        * addr regs.
-        *
-        * The first 8 bytes of each entry are the requested border
-        * color in fp16.  Unclear about the rest.. could be used for
-        * other formats, or could simply be for aligning the pitch
-        * to 32 pixels.
-        */
-#define BORDERCOLOR_SIZE 0x40
-
        struct u_upload_mgr *border_color_uploader;
        struct pipe_resource *border_color_buf;
 
@@ -112,13 +96,13 @@ struct fd3_context {
        struct ir3_shader_key last_key;
 };
 
-static INLINE struct fd3_context *
+static inline struct fd3_context *
 fd3_context(struct fd_context *ctx)
 {
        return (struct fd3_context *)ctx;
 }
 
 struct pipe_context *
-fd3_context_create(struct pipe_screen *pscreen, void *priv);
+fd3_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
 
 #endif /* FD3_CONTEXT_H_ */