freedreno: introduce fd_batch
[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_draw.c
index b06d4253a99356c175d670a0d22f30e0373a6b8d..0593b253f1ace25411b953d23e4f9143d66f5169 100644 (file)
 #include "fd3_format.h"
 #include "fd3_zsa.h"
 
+static inline uint32_t
+add_sat(uint32_t a, int32_t b)
+{
+       int64_t ret = (uint64_t)a + (int64_t)b;
+       if (ret > ~0U)
+               return ~0U;
+       if (ret < 0)
+               return 0;
+       return (uint32_t)ret;
+}
 
 static void
 draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
                struct fd3_emit *emit)
 {
        const struct pipe_draw_info *info = emit->info;
+       enum pc_di_primtype primtype = ctx->primtypes[info->mode];
 
        fd3_emit_state(ctx, ring, emit);
 
@@ -58,16 +69,23 @@ draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
        OUT_RING(ring, 0x0000000b);             /* PC_VERTEX_REUSE_BLOCK_CNTL */
 
        OUT_PKT0(ring, REG_A3XX_VFD_INDEX_MIN, 4);
-       OUT_RING(ring, info->min_index);        /* VFD_INDEX_MIN */
-       OUT_RING(ring, info->max_index);        /* VFD_INDEX_MAX */
+       OUT_RING(ring, add_sat(info->min_index, info->index_bias)); /* VFD_INDEX_MIN */
+       OUT_RING(ring, add_sat(info->max_index, info->index_bias)); /* VFD_INDEX_MAX */
        OUT_RING(ring, info->start_instance);   /* VFD_INSTANCEID_OFFSET */
-       OUT_RING(ring, info->start);            /* VFD_INDEX_OFFSET */
+       OUT_RING(ring, info->indexed ? info->index_bias : info->start); /* VFD_INDEX_OFFSET */
 
        OUT_PKT0(ring, REG_A3XX_PC_RESTART_INDEX, 1);
        OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */
                        info->restart_index : 0xffffffff);
 
+       /* points + psize -> spritelist: */
+       if (ctx->rasterizer->point_size_per_vertex &&
+                       fd3_emit_get_vp(emit)->writes_psize &&
+                       (info->mode == PIPE_PRIM_POINTS))
+               primtype = DI_PT_POINTLIST_PSIZE;
+
        fd_draw_emit(ctx, ring,
+                       primtype,
                        emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY,
                        info);
 }
@@ -83,79 +101,84 @@ fixup_shader_state(struct fd_context *ctx, struct ir3_shader_key *key)
        struct ir3_shader_key *last_key = &fd3_ctx->last_key;
 
        if (!ir3_shader_key_equal(last_key, key)) {
-               ctx->dirty |= FD_DIRTY_PROG;
-
                if (last_key->has_per_samp || key->has_per_samp) {
                        if ((last_key->vsaturate_s != key->vsaturate_s) ||
                                        (last_key->vsaturate_t != key->vsaturate_t) ||
-                                       (last_key->vsaturate_r != key->vsaturate_r) ||
-                                       (last_key->vinteger_s != key->vinteger_s))
-                               ctx->prog.dirty |= FD_SHADER_DIRTY_VP;
+                                       (last_key->vsaturate_r != key->vsaturate_r))
+                               ctx->dirty |= FD_SHADER_DIRTY_VP;
 
                        if ((last_key->fsaturate_s != key->fsaturate_s) ||
                                        (last_key->fsaturate_t != key->fsaturate_t) ||
-                                       (last_key->fsaturate_r != key->fsaturate_r) ||
-                                       (last_key->finteger_s != key->finteger_s))
-                               ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
+                                       (last_key->fsaturate_r != key->fsaturate_r))
+                               ctx->dirty |= FD_SHADER_DIRTY_FP;
                }
 
+               if (last_key->vclamp_color != key->vclamp_color)
+                       ctx->dirty |= FD_SHADER_DIRTY_VP;
+
+               if (last_key->fclamp_color != key->fclamp_color)
+                       ctx->dirty |= FD_SHADER_DIRTY_FP;
+
                if (last_key->color_two_side != key->color_two_side)
-                       ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
+                       ctx->dirty |= FD_SHADER_DIRTY_FP;
 
                if (last_key->half_precision != key->half_precision)
-                       ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
-
-               if (last_key->alpha != key->alpha)
-                       ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
+                       ctx->dirty |= FD_SHADER_DIRTY_FP;
 
                fd3_ctx->last_key = *key;
        }
 }
 
-static void
+static bool
 fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
 {
        struct fd3_context *fd3_ctx = fd3_context(ctx);
-       struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
        struct fd3_emit emit = {
+               .debug = &ctx->debug,
                .vtx  = &ctx->vtx,
                .prog = &ctx->prog,
                .info = info,
                .key = {
-                       /* do binning pass first: */
-                       .binning_pass = true,
-                       .color_two_side = ctx->rasterizer ? ctx->rasterizer->light_twoside : false,
-                       .alpha = util_format_is_alpha(pipe_surface_format(pfb->cbufs[0])),
+                       .color_two_side = ctx->rasterizer->light_twoside,
+                       .vclamp_color = ctx->rasterizer->clamp_vertex_color,
+                       .fclamp_color = ctx->rasterizer->clamp_fragment_color,
                        // TODO set .half_precision based on render target format,
                        // ie. float16 and smaller use half, float32 use full..
                        .half_precision = !!(fd_mesa_debug & FD_DBG_FRAGHALF),
-                       .has_per_samp = (fd3_ctx->fsaturate || fd3_ctx->vsaturate ||
-                                                        fd3_ctx->vinteger_s || fd3_ctx->finteger_s),
+                       .has_per_samp = (fd3_ctx->fsaturate || fd3_ctx->vsaturate),
                        .vsaturate_s = fd3_ctx->vsaturate_s,
                        .vsaturate_t = fd3_ctx->vsaturate_t,
                        .vsaturate_r = fd3_ctx->vsaturate_r,
                        .fsaturate_s = fd3_ctx->fsaturate_s,
                        .fsaturate_t = fd3_ctx->fsaturate_t,
                        .fsaturate_r = fd3_ctx->fsaturate_r,
-                       .vinteger_s = fd3_ctx->vinteger_s,
-                       .finteger_s = fd3_ctx->finteger_s,
                },
-               .format = pipe_surface_format(pfb->cbufs[0]),
-               .rasterflat = ctx->rasterizer && ctx->rasterizer->flatshade,
+               .rasterflat = ctx->rasterizer->flatshade,
+               .sprite_coord_enable = ctx->rasterizer->sprite_coord_enable,
+               .sprite_coord_mode = ctx->rasterizer->sprite_coord_mode,
        };
-       unsigned dirty;
 
        fixup_shader_state(ctx, &emit.key);
 
-       dirty = ctx->dirty;
-       emit.dirty = dirty & ~(FD_DIRTY_BLEND);
-       draw_impl(ctx, ctx->binning_ring, &emit);
+       unsigned dirty = ctx->dirty;
+
+       /* do regular pass first, since that is more likely to fail compiling: */
+
+       if (!(fd3_emit_get_vp(&emit) && fd3_emit_get_fp(&emit)))
+               return false;
 
-       /* and now regular (non-binning) pass: */
        emit.key.binning_pass = false;
        emit.dirty = dirty;
+       draw_impl(ctx, ctx->batch->draw, &emit);
+
+       /* and now binning pass: */
+       emit.key.binning_pass = true;
+       emit.dirty = dirty & ~(FD_DIRTY_BLEND);
        emit.vp = NULL;   /* we changed key so need to refetch vp */
-       draw_impl(ctx, ctx->ring, &emit);
+       emit.fp = NULL;
+       draw_impl(ctx, ctx->batch->binning, &emit);
+
+       return true;
 }
 
 /* clear operations ignore viewport state, so we need to reset it
@@ -186,8 +209,9 @@ static void
 fd3_clear_binning(struct fd_context *ctx, unsigned dirty)
 {
        struct fd3_context *fd3_ctx = fd3_context(ctx);
-       struct fd_ringbuffer *ring = ctx->binning_ring;
+       struct fd_ringbuffer *ring = ctx->batch->binning;
        struct fd3_emit emit = {
+               .debug = &ctx->debug,
                .vtx  = &fd3_ctx->solid_vbuf_state,
                .prog = &ctx->solid_prog,
                .key = {
@@ -217,7 +241,7 @@ fd3_clear_binning(struct fd_context *ctx, unsigned dirty)
        fd_event_write(ctx, ring, PERFCOUNTER_STOP);
 
        fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY,
-                       DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
+                       DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 static void
@@ -226,17 +250,16 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
 {
        struct fd3_context *fd3_ctx = fd3_context(ctx);
        struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
-       enum pipe_format format = pipe_surface_format(pfb->cbufs[0]);
-       struct fd_ringbuffer *ring = ctx->ring;
+       struct fd_ringbuffer *ring = ctx->batch->draw;
        unsigned dirty = ctx->dirty;
-       unsigned ce, i;
+       unsigned i;
        struct fd3_emit emit = {
+               .debug = &ctx->debug,
                .vtx  = &fd3_ctx->solid_vbuf_state,
                .prog = &ctx->solid_prog,
                .key = {
-                       .half_precision = fd3_half_precision(format),
+                       .half_precision = fd_half_precision(pfb),
                },
-               .format = format,
        };
 
        dirty &= FD_DIRTY_FRAMEBUFFER | FD_DIRTY_SCISSOR;
@@ -313,17 +336,12 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
                                A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
        }
 
-       if (buffers & PIPE_CLEAR_COLOR) {
-               ce = 0xf;
-       } else {
-               ce = 0x0;
-       }
-
-       for (i = 0; i < 4; i++) {
+       for (i = 0; i < A3XX_MAX_RENDER_TARGETS; i++) {
                OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
                OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) |
                                A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS) |
-                               A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(ce));
+                               COND(buffers & (PIPE_CLEAR_COLOR0 << i),
+                                        A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0xf)));
 
                OUT_PKT0(ring, REG_A3XX_RB_MRT_BLEND_CONTROL(i), 1);
                OUT_RING(ring, A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(FACTOR_ONE) |
@@ -339,7 +357,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
 
        fd3_emit_vertex_bufs(ring, &emit);
 
-       fd3_emit_constant(ring, SB_FRAG_SHADER, 0, 0, 4, color->ui, NULL);
+       fd3_emit_const(ring, SHADER_FRAGMENT, 0, 0, 4, color->ui, NULL);
 
        OUT_PKT0(ring, REG_A3XX_PC_PRIM_VTX_CNTL, 1);
        OUT_RING(ring, A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(0) |
@@ -357,7 +375,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
        fd_event_write(ctx, ring, PERFCOUNTER_STOP);
 
        fd_draw(ctx, ring, DI_PT_RECTLIST, USE_VISIBILITY,
-                       DI_SRC_SEL_AUTO_INDEX, 2, INDEX_SIZE_IGN, 0, 0, NULL);
+                       DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL);
 }
 
 void