freedreno/layout: layout simplifications and pitch from level 0 pitch
[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_draw.c
index 761f25bc0158a7f751803e6cc85a92f963b3afce..e5485a0a01185379c690161d94fe961cbf2d9311 100644 (file)
@@ -1,5 +1,3 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
 /*
  * Copyright (C) 2013 Rob Clark <robclark@freedesktop.org>
  *
@@ -30,7 +28,7 @@
 #include "util/u_string.h"
 #include "util/u_memory.h"
 #include "util/u_prim.h"
-#include "util/u_format.h"
+#include "util/format/u_format.h"
 
 #include "freedreno_state.h"
 #include "freedreno_resource.h"
@@ -85,7 +83,7 @@ draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
                primtype = DI_PT_POINTLIST_PSIZE;
 
        fd_draw_emit(ctx->batch, ring, primtype,
-                       emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY,
+                       emit->binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY,
                        info, index_offset);
 }
 
@@ -128,8 +126,6 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
                        .color_two_side = ctx->rasterizer->light_twoside,
                        .vclamp_color = ctx->rasterizer->clamp_vertex_color,
                        .fclamp_color = ctx->rasterizer->clamp_fragment_color,
-                       .half_precision = ctx->in_blit &&
-                                       fd_half_precision(&ctx->batch->framebuffer),
                        .has_per_samp = (fd3_ctx->fsaturate || fd3_ctx->vsaturate),
                        .vsaturate_s = fd3_ctx->vsaturate_s,
                        .vsaturate_t = fd3_ctx->vsaturate_t,
@@ -143,27 +139,32 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
                .sprite_coord_mode = ctx->rasterizer->sprite_coord_mode,
        };
 
-       if (fd3_needs_manual_clipping(ctx->prog.vp, ctx->rasterizer))
+       if (fd3_needs_manual_clipping(ctx->prog.vs, ctx->rasterizer))
                emit.key.ucp_enables = ctx->rasterizer->clip_plane_enable;
 
        fixup_shader_state(ctx, &emit.key);
 
        unsigned dirty = ctx->dirty;
+       const struct ir3_shader_variant *vp = fd3_emit_get_vp(&emit);
+       const struct ir3_shader_variant *fp = fd3_emit_get_fp(&emit);
 
        /* do regular pass first, since that is more likely to fail compiling: */
 
-       if (!(fd3_emit_get_vp(&emit) && fd3_emit_get_fp(&emit)))
+       if (!vp || !fp)
                return false;
 
-       emit.key.binning_pass = false;
+       ctx->stats.vs_regs += ir3_shader_halfregs(vp);
+       ctx->stats.fs_regs += ir3_shader_halfregs(fp);
+
+       emit.binning_pass = false;
        emit.dirty = dirty;
        draw_impl(ctx, ctx->batch->draw, &emit, index_offset);
 
        /* and now binning pass: */
-       emit.key.binning_pass = true;
+       emit.binning_pass = true;
        emit.dirty = dirty & ~(FD_DIRTY_BLEND);
-       emit.vp = NULL;   /* we changed key so need to refetch vp */
-       emit.fp = NULL;
+       emit.vs = NULL;   /* we changed key so need to refetch vs */
+       emit.fs = NULL;
        draw_impl(ctx, ctx->batch->binning, &emit, index_offset);
 
        fd_context_all_clean(ctx);