freedreno: use PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND
[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_emit.c
index af1478599420f1eb19ace7e2ac0db756afef2305..6509435636c2730c9fcd3d7f9bc8ab44914af8c6 100644 (file)
@@ -735,7 +735,6 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                        bool is_int = util_format_is_pure_integer(format);
                        bool has_alpha = util_format_has_alpha(format);
                        uint32_t control = blend->rb_mrt[i].control;
-                       uint32_t blend_control = blend->rb_mrt[i].blend_control_alpha;
 
                        if (is_int) {
                                control &= (A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK |
@@ -746,10 +745,7 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                        if (format == PIPE_FORMAT_NONE)
                                control &= ~A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK;
 
-                       if (has_alpha) {
-                               blend_control |= blend->rb_mrt[i].blend_control_rgb;
-                       } else {
-                               blend_control |= blend->rb_mrt[i].blend_control_no_alpha_rgb;
+                       if (!has_alpha) {
                                control &= ~A3XX_RB_MRT_CONTROL_BLEND2;
                        }
 
@@ -769,7 +765,7 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                        OUT_RING(ring, control);
 
                        OUT_PKT0(ring, REG_A3XX_RB_MRT_BLEND_CONTROL(i), 1);
-                       OUT_RING(ring, blend_control |
+                       OUT_RING(ring, blend->rb_mrt[i].blend_control |
                                        COND(!is_float, A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE));
                }
        }