freedreno/a3xx: use cs patch instead of RFI+RMW

[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_emit.h

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
index 50559d10d2237e6edf835a168a6b0baef9f9545d..1b4774d83f999e6c0e4f6a74514b12a635137d49 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h
@@ -62,28 +62,4 @@ void fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                uint32_t dirty, bool binning);
 void fd3_emit_restore(struct fd_context *ctx);
 
-
-/* use RMW (read-modify-write) to update RB_RENDER_CONTROL since the
- * GMEM/binning code is deciding on the bin-width (and whether to
- * use binning) after the draw/clear state is emitted.
- */
-
-#define RBRC_DRAW_STATE  (A3XX_RB_RENDER_CONTROL_ALPHA_TEST | \
-               A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC__MASK)
-
-static inline void
-fd3_emit_rbrc_draw_state(struct fd_context *ctx,
-               struct fd_ringbuffer *ring, uint32_t val)
-{
-       assert(!(val & ~RBRC_DRAW_STATE));
-       if (val != ctx->rmw.rbrc_draw) {
-               fd_rmw_wfi(ctx, ring);
-               OUT_PKT3(ring, CP_REG_RMW, 3);
-               OUT_RING(ring, REG_A3XX_RB_RENDER_CONTROL);
-               OUT_RING(ring, ~RBRC_DRAW_STATE);
-               OUT_RING(ring, val);
-               ctx->rmw.rbrc_draw = val;
-       }
-}
-
 #endif /* FD3_EMIT_H */