freedreno: constify fd_vsc_pipe
[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_emit.h
index 8f21919c9a7693c548946bbb3c66428c25963383..7a905628dd62d68c40a86ae46143938533bfa85c 100644 (file)
@@ -1,5 +1,3 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
 /*
  * Copyright (C) 2013 Rob Clark <robclark@freedesktop.org>
  *
 #include "freedreno_context.h"
 #include "fd3_format.h"
 #include "fd3_program.h"
-#include "ir3_shader.h"
+#include "ir3_gallium.h"
 
 struct fd_ringbuffer;
-enum adreno_state_block;
-
-void fd3_emit_constant(struct fd_ringbuffer *ring,
-               enum adreno_state_block sb,
-               uint32_t regid, uint32_t offset, uint32_t sizedwords,
-               const uint32_t *dwords, struct pipe_resource *prsc);
 
 void fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
                struct pipe_surface **psurf, int bufs);
 
 /* grouped together emit-state for prog/vertex/state emit: */
 struct fd3_emit {
+       struct pipe_debug_callback *debug;
        const struct fd_vertex_state *vtx;
        const struct fd_program_stateobj *prog;
        const struct pipe_draw_info *info;
+       bool binning_pass;
        struct ir3_shader_key key;
-       uint32_t dirty;
+       enum fd_dirty_3d_state dirty;
 
        uint32_t sprite_coord_enable;
        bool sprite_coord_mode;
        bool rasterflat;
 
        /* cached to avoid repeated lookups of same variants: */
-       struct ir3_shader_variant *vp, *fp;
+       const struct ir3_shader_variant *vs, *fs;
 };
 
-static inline struct ir3_shader_variant *
+static inline const struct ir3_shader_variant *
 fd3_emit_get_vp(struct fd3_emit *emit)
 {
-       if (!emit->vp) {
-               struct fd3_shader_stateobj *so = emit->prog->vp;
-               emit->vp = ir3_shader_variant(so->shader, emit->key);
+       if (!emit->vs) {
+               struct ir3_shader *shader = emit->prog->vs;
+               emit->vs = ir3_shader_variant(shader, emit->key,
+                               emit->binning_pass, emit->debug);
        }
-       return emit->vp;
+       return emit->vs;
 }
 
-static inline struct ir3_shader_variant *
+static inline const struct ir3_shader_variant *
 fd3_emit_get_fp(struct fd3_emit *emit)
 {
-       if (!emit->fp) {
-               struct fd3_shader_stateobj *so = emit->prog->fp;
-               emit->fp = ir3_shader_variant(so->shader, emit->key);
+       if (!emit->fs) {
+               if (emit->binning_pass) {
+                       /* use dummy stateobj to simplify binning vs non-binning: */
+                       static const struct ir3_shader_variant binning_fs = {};
+                       emit->fs = &binning_fs;
+               } else {
+                       struct ir3_shader *shader = emit->prog->fs;
+                       emit->fs = ir3_shader_variant(shader, emit->key,
+                                       false, emit->debug);
+               }
        }
-       return emit->fp;
+       return emit->fs;
 }
 
 void fd3_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd3_emit *emit);
@@ -88,6 +90,26 @@ void fd3_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd3_emit *emit);
 void fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                struct fd3_emit *emit);
 
-void fd3_emit_restore(struct fd_context *ctx);
+void fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring);
+
+void fd3_emit_init_screen(struct pipe_screen *pscreen);
+void fd3_emit_init(struct pipe_context *pctx);
+
+static inline void
+fd3_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
+{
+       __OUT_IB(ring, true, target);
+}
+
+static inline void
+fd3_emit_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
+{
+       fd_wfi(batch, ring);
+       OUT_PKT0(ring, REG_A3XX_UCHE_CACHE_INVALIDATE0_REG, 2);
+       OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(0));
+       OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(0) |
+                       A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE(INVALIDATE) |
+                       A3XX_UCHE_CACHE_INVALIDATE1_REG_ENTIRE_CACHE);
+}
 
 #endif /* FD3_EMIT_H */