freedreno: Replace OUT_RELOCW with OUT_RELOC.

[mesa.git] / src / gallium / drivers / freedreno / a3xx / fd3_gmem.c

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index af4c27373897ed651c0451f94ec97ec274da3839..6bc37189108f2b60b845a693bae2d33f107e8710 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -116,7 +116,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
                if (bin_w || (i >= nr_bufs) || !bufs[i]) {
                        OUT_RING(ring, A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(base));
                } else {
-                       OUT_RELOCW(ring, rsc->bo, offset, 0, -1);
+                       OUT_RELOC(ring, rsc->bo, offset, 0, -1);
                }
 
                OUT_PKT0(ring, REG_A3XX_SP_FS_IMAGE_OUTPUT_REG(i), 1);
@@ -183,7 +183,7 @@ emit_binning_workaround(struct fd_batch *batch)
        OUT_RING(ring, A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) |
                        A3XX_RB_COPY_CONTROL_MODE(0) |
                        A3XX_RB_COPY_CONTROL_GMEM_BASE(0));
-       OUT_RELOCW(ring, fd_resource(ctx->solid_vbuf)->bo, 0x20, 0, -1);  /* RB_COPY_DEST_BASE */
+       OUT_RELOC(ring, fd_resource(ctx->solid_vbuf)->bo, 0x20, 0, -1);  /* RB_COPY_DEST_BASE */
        OUT_RING(ring, A3XX_RB_COPY_DEST_PITCH_PITCH(128));
        OUT_RING(ring, A3XX_RB_COPY_DEST_INFO_TILE(LINEAR) |
                        A3XX_RB_COPY_DEST_INFO_FORMAT(RB_R8G8B8A8_UNORM) |
@@ -341,7 +341,7 @@ emit_gmem2mem_surf(struct fd_batch *batch,
                                 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT,
                                 A3XX_RB_COPY_CONTROL_DEPTH32_RESOLVE));
 
-       OUT_RELOCW(ring, rsc->bo, offset, 0, -1);    /* RB_COPY_DEST_BASE */
+       OUT_RELOC(ring, rsc->bo, offset, 0, -1);    /* RB_COPY_DEST_BASE */
        OUT_RING(ring, A3XX_RB_COPY_DEST_PITCH_PITCH(slice->pitch));
        OUT_RING(ring, A3XX_RB_COPY_DEST_INFO_TILE(rsc->layout.tile_mode) |
                        A3XX_RB_COPY_DEST_INFO_FORMAT(fd3_pipe2color(format)) |
@@ -558,7 +558,7 @@ fd3_emit_tile_mem2gmem(struct fd_batch *batch, const struct fd_tile *tile)
        y1 = ((float)tile->yoff + bin_h) / ((float)pfb->height);
 
        OUT_PKT3(ring, CP_MEM_WRITE, 5);
-       OUT_RELOCW(ring, fd_resource(ctx->blit_texcoord_vbuf)->bo, 0, 0, 0);
+       OUT_RELOC(ring, fd_resource(ctx->blit_texcoord_vbuf)->bo, 0, 0, 0);
        OUT_RING(ring, fui(x0));
        OUT_RING(ring, fui(y0));
        OUT_RING(ring, fui(x1));
@@ -772,7 +772,7 @@ update_vsc_pipe(struct fd_batch *batch)
        int i;
 
        OUT_PKT0(ring, REG_A3XX_VSC_SIZE_ADDRESS, 1);
-       OUT_RELOCW(ring, fd3_ctx->vsc_size_mem, 0, 0, 0); /* VSC_SIZE_ADDRESS */
+       OUT_RELOC(ring, fd3_ctx->vsc_size_mem, 0, 0, 0); /* VSC_SIZE_ADDRESS */
 
        for (i = 0; i < 8; i++) {
                const struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
@@ -787,7 +787,7 @@ update_vsc_pipe(struct fd_batch *batch)
                                A3XX_VSC_PIPE_CONFIG_Y(pipe->y) |
                                A3XX_VSC_PIPE_CONFIG_W(pipe->w) |
                                A3XX_VSC_PIPE_CONFIG_H(pipe->h));
-               OUT_RELOCW(ring, ctx->vsc_pipe_bo[i], 0, 0, 0);       /* VSC_PIPE[i].DATA_ADDRESS */
+               OUT_RELOC(ring, ctx->vsc_pipe_bo[i], 0, 0, 0);       /* VSC_PIPE[i].DATA_ADDRESS */
                OUT_RING(ring, fd_bo_size(ctx->vsc_pipe_bo[i]) - 32); /* VSC_PIPE[i].DATA_LENGTH */
        }
 }
@@ -1024,8 +1024,8 @@ fd3_emit_tile_renderprep(struct fd_batch *batch, const struct fd_tile *tile)
 
 
                OUT_PKT3(ring, CP_SET_BIN_DATA, 2);
-               OUT_RELOCW(ring, pipe_bo, 0, 0, 0);     /* BIN_DATA_ADDR <- VSC_PIPE[p].DATA_ADDRESS */
-               OUT_RELOCW(ring, fd3_ctx->vsc_size_mem, /* BIN_SIZE_ADDR <- VSC_SIZE_ADDRESS + (p * 4) */
+               OUT_RELOC(ring, pipe_bo, 0, 0, 0);     /* BIN_DATA_ADDR <- VSC_PIPE[p].DATA_ADDRESS */
+               OUT_RELOC(ring, fd3_ctx->vsc_size_mem, /* BIN_SIZE_ADDR <- VSC_SIZE_ADDRESS + (p * 4) */
                                (tile->p * 4), 0, 0);
        } else {
                OUT_PKT0(ring, REG_A3XX_PC_VSTREAM_CONTROL, 1);