freedreno/a4xx: add 16-bit unorm/snorm format texturing/rendering

[mesa.git] / src / gallium / drivers / freedreno / a4xx / a4xx.xml.h

diff --git a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
index 9f9703654647cbb1c14f246d7b553330d088c48a..cc48cdc4c6112e06f4d788226dff4fb228f68142 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
+++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2015-05-20 20:03:14)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10755 bytes, from 2015-09-14 20:46:55)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14968 bytes, from 2015-05-20 20:12:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  67771 bytes, from 2015-09-14 20:46:55)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  63914 bytes, from 2015-10-27 17:13:16)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  68291 bytes, from 2015-11-17 16:39:59)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  64038 bytes, from 2015-11-17 16:37:36)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml         (   1773 bytes, from 2015-09-24 17:30:00)
 
 Copyright (C) 2013-2015 by the following authors:
@@ -52,6 +52,8 @@ enum a4xx_color_fmt {
        RB4_R8G8_SNORM = 16,
        RB4_R8G8_UINT = 17,
        RB4_R8G8_SINT = 18,
+       RB4_R16_UNORM = 19,
+       RB4_R16_SNORM = 20,
        RB4_R16_FLOAT = 21,
        RB4_R16_UINT = 22,
        RB4_R16_SINT = 23,
@@ -63,12 +65,16 @@ enum a4xx_color_fmt {
        RB4_R10G10B10A2_UNORM = 31,
        RB4_R10G10B10A2_UINT = 34,
        RB4_R11G11B10_FLOAT = 39,
+       RB4_R16G16_UNORM = 40,
+       RB4_R16G16_SNORM = 41,
        RB4_R16G16_FLOAT = 42,
        RB4_R16G16_UINT = 43,
        RB4_R16G16_SINT = 44,
        RB4_R32_FLOAT = 45,
        RB4_R32_UINT = 46,
        RB4_R32_SINT = 47,
+       RB4_R16G16B16A16_UNORM = 52,
+       RB4_R16G16B16A16_SNORM = 53,
        RB4_R16G16B16A16_FLOAT = 54,
        RB4_R16G16B16A16_UINT = 55,
        RB4_R16G16B16A16_SINT = 56,
@@ -154,7 +160,7 @@ enum a4xx_vtx_fmt {
 
 enum a4xx_tex_fmt {
        TFMT4_5_6_5_UNORM = 11,
-       TFMT4_5_5_5_1_UNORM = 10,
+       TFMT4_5_5_5_1_UNORM = 9,
        TFMT4_4_4_4_4_UNORM = 8,
        TFMT4_X8Z24_UNORM = 71,
        TFMT4_10_10_10_2_UNORM = 33,
@@ -172,6 +178,12 @@ enum a4xx_tex_fmt {
        TFMT4_8_SINT = 7,
        TFMT4_8_8_SINT = 17,
        TFMT4_8_8_8_8_SINT = 31,
+       TFMT4_16_UNORM = 18,
+       TFMT4_16_16_UNORM = 38,
+       TFMT4_16_16_16_16_UNORM = 51,
+       TFMT4_16_SNORM = 19,
+       TFMT4_16_16_SNORM = 39,
+       TFMT4_16_16_16_16_SNORM = 52,
        TFMT4_16_UINT = 21,
        TFMT4_16_16_UINT = 41,
        TFMT4_16_16_16_16_UINT = 54,
@@ -192,6 +204,12 @@ enum a4xx_tex_fmt {
        TFMT4_32_32_32_32_FLOAT = 63,
        TFMT4_9_9_9_E5_FLOAT = 32,
        TFMT4_11_11_10_FLOAT = 37,
+       TFMT4_DXT1 = 86,
+       TFMT4_DXT3 = 87,
+       TFMT4_DXT5 = 88,
+       TFMT4_BPTC_UFLOAT = 97,
+       TFMT4_BPTC_FLOAT = 98,
+       TFMT4_BPTC = 99,
        TFMT4_ATC_RGB = 100,
        TFMT4_ATC_RGBA_EXPLICIT = 101,
        TFMT4_ATC_RGBA_INTERPOLATED = 102,
@@ -2056,6 +2074,8 @@ static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_GS(uint32_t val)
 #define REG_A4XX_GRAS_PERFCTR_TSE_SEL_3                                0x00000c8b
 
 #define REG_A4XX_GRAS_CL_CLIP_CNTL                             0x00002000
+#define A4XX_GRAS_CL_CLIP_CNTL_CLIP_DISABLE                    0x00008000
+#define A4XX_GRAS_CL_CLIP_CNTL_ZERO_GB_SCALE_Z                 0x00400000
 
 #define REG_A4XX_GRAS_CLEAR_CNTL                               0x00002003
 #define A4XX_GRAS_CLEAR_CNTL_NOT_FASTCLEAR                     0x00000001
@@ -2738,6 +2758,12 @@ static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val)
 {
        return ((val) << A4XX_TEX_SAMP_0_ANISO__SHIFT) & A4XX_TEX_SAMP_0_ANISO__MASK;
 }
+#define A4XX_TEX_SAMP_0_LOD_BIAS__MASK                         0xfff80000
+#define A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT                                19
+static inline uint32_t A4XX_TEX_SAMP_0_LOD_BIAS(float val)
+{
+       return ((((int32_t)(val * 256.0))) << A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A4XX_TEX_SAMP_0_LOD_BIAS__MASK;
+}
 
 #define REG_A4XX_TEX_SAMP_1                                    0x00000001
 #define A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK                     0x0000000e
@@ -2746,6 +2772,7 @@ static inline uint32_t A4XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val
 {
        return ((val) << A4XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK;
 }
+#define A4XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF                 0x00000010
 #define A4XX_TEX_SAMP_1_UNNORM_COORDS                          0x00000020
 #define A4XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR                   0x00000040
 #define A4XX_TEX_SAMP_1_MAX_LOD__MASK                          0x000fff00