radeonsi: extract TGSI memory/texture opcode handling into its own file

[mesa.git] / src / gallium / drivers / freedreno / a4xx / fd4_context.h

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_context.h b/src/gallium/drivers/freedreno/a4xx/fd4_context.h
index 8996de932b8576bef9a15aca3d1cc4fbc99ea7be..4c06644a9fa091771cd43a2ae54f76cea78777db 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_context.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_context.h
@@ -49,26 +49,6 @@ struct fd4_context {
         */
        struct fd_bo *vsc_size_mem;
 
-       /* vertex buf used for clear/gmem->mem vertices, and mem->gmem
-        * vertices:
-        */
-       struct pipe_resource *solid_vbuf;
-
-       /* vertex buf used for mem->gmem tex coords:
-        */
-       struct pipe_resource *blit_texcoord_vbuf;
-
-       /* vertex state for solid_vbuf:
-        *    - solid_vbuf / 12 / R32G32B32_FLOAT
-        */
-       struct fd_vertex_state solid_vbuf_state;
-
-       /* vertex state for blit_prog:
-        *    - blit_texcoord_vbuf / 8 / R32G32_FLOAT
-        *    - solid_vbuf / 12 / R32G32B32_FLOAT
-        */
-       struct fd_vertex_state blit_vbuf_state;
-
        struct u_upload_mgr *border_color_uploader;
        struct pipe_resource *border_color_buf;
 
@@ -85,6 +65,9 @@ struct fd4_context {
         */
        uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
 
+       /* bitmask of samplers which need astc srgb workaround: */
+       uint16_t vastc_srgb, fastc_srgb;
+
        /* some state changes require a different shader variant.  Keep
         * track of this so we know when we need to re-emit shader state
         * due to variant change.  See fixup_shader_state()