freedreno/ir3: move binning_pass out of shader variant key

[mesa.git] / src / gallium / drivers / freedreno / a4xx / fd4_draw.c

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
index 029c6086f2deaaee45b945bdf5add07d30ed7be8..d854ebc4a40c907ca5f8ea2a219ad7f4c677a934 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -67,7 +67,7 @@ draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
                primtype = DI_PT_POINTLIST_PSIZE;
 
        fd4_draw_emit(ctx->batch, ring, primtype,
-                       emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY,
+                       emit->binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY,
                        info, index_offset);
 }
 
@@ -144,7 +144,7 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
        ctx->stats.vs_regs += ir3_shader_halfregs(vp);
        ctx->stats.fs_regs += ir3_shader_halfregs(fp);
 
-       emit.key.binning_pass = false;
+       emit.binning_pass = false;
        emit.dirty = dirty;
 
        struct fd_ringbuffer *ring = ctx->batch->draw;
@@ -168,7 +168,7 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
        }
 
        /* and now binning pass: */
-       emit.key.binning_pass = true;
+       emit.binning_pass = true;
        emit.dirty = dirty & ~(FD_DIRTY_BLEND);
        emit.vp = NULL;   /* we changed key so need to refetch vp */
        emit.fp = NULL;