u_upload_mgr: pass alignment to u_upload_alloc manually

[mesa.git] / src / gallium / drivers / freedreno / a4xx / fd4_emit.c

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 1df0657357ebed710f3ad3a3fb1ec623f7ee8ac2..bc62a5d9a4b02f21f8149bfdc489764fbdf1b4fa 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -133,7 +133,8 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
        void *ptr;
 
        u_upload_alloc(fd4_ctx->border_color_uploader,
-                       0, 2 * PIPE_MAX_SAMPLERS * BORDERCOLOR_SIZE, &off,
+                       0, BORDER_COLOR_UPLOAD_SIZE,
+                      BORDER_COLOR_UPLOAD_SIZE, &off,
                        &fd4_ctx->border_color_buf,
                        &ptr);
 
@@ -181,9 +182,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
                OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS) |
                                CP_LOAD_STATE_1_EXT_SRC_ADDR(0));
                for (i = 0; i < tex->num_textures; i++) {
-                       static const struct fd4_pipe_sampler_view dummy_view = {
-                               .base.target = PIPE_TEXTURE_1D,
-                       };
+                       static const struct fd4_pipe_sampler_view dummy_view = {};
                        const struct fd4_pipe_sampler_view *view = tex->textures[i] ?
                                        fd4_pipe_sampler_view(tex->textures[i]) :
                                        &dummy_view;
@@ -194,16 +193,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
                        OUT_RING(ring, view->texconst3);
                        if (view->base.texture) {
                                struct fd_resource *rsc = fd_resource(view->base.texture);
-                               unsigned start = fd_sampler_first_level(&view->base);
-                               uint32_t offset;
-                               if (rsc->base.b.target == PIPE_BUFFER) {
-                                       offset = view->base.u.buf.first_element *
-                                               util_format_get_blocksize(view->base.format);
-                               } else {
-                                       offset = fd_resource_offset(
-                                                       rsc, start, view->base.u.tex.first_layer);
-                               }
-                               OUT_RELOC(ring, rsc->bo, offset, view->texconst4, 0);
+                               OUT_RELOC(ring, rsc->bo, view->offset, view->texconst4, 0);
                        } else {
                                OUT_RING(ring, 0x00000000);
                        }
@@ -540,14 +530,16 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
                OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1);
                OUT_RING(ring, zsa->rb_depth_control |
-                               COND(fragz, A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE));
+                               COND(fragz, A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE) |
+                               COND(fragz && fp->frag_coord, A4XX_RB_DEPTH_CONTROL_FORCE_FRAGZ_TO_FS));
 
                /* maybe this register/bitfield needs a better name.. this
                 * appears to be just disabling early-z
                 */
                OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1);
                OUT_RING(ring, zsa->gras_alpha_control |
-                               COND(fragz, A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE));
+                               COND(fragz, A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE) |
+                               COND(fragz && fp->frag_coord, A4XX_GRAS_ALPHA_CONTROL_FORCE_FRAGZ_TO_FS));
        }
 
        if (dirty & FD_DIRTY_RASTERIZER) {
@@ -624,7 +616,7 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZSCALE_0(ctx->viewport.scale[2]));
        }
 
-       if (dirty & FD_DIRTY_PROG) {
+       if (dirty & (FD_DIRTY_PROG | FD_DIRTY_FRAMEBUFFER)) {
                struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
                fd4_program_emit(ring, emit, pfb->nr_cbufs, pfb->cbufs);
        }
@@ -673,19 +665,48 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                                A4XX_RB_FS_OUTPUT_SAMPLE_MASK(0xffff));
        }
 
-       if (dirty & FD_DIRTY_BLEND_COLOR) {
+       if (dirty & (FD_DIRTY_BLEND_COLOR | FD_DIRTY_FRAMEBUFFER)) {
                struct pipe_blend_color *bcolor = &ctx->blend_color;
+               struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
+               float factor = 65535.0;
+               int i;
+
+               for (i = 0; i < pfb->nr_cbufs; i++) {
+                       enum pipe_format format = pipe_surface_format(pfb->cbufs[i]);
+                       const struct util_format_description *desc =
+                               util_format_description(format);
+                       int j;
+
+                       if (desc->is_mixed)
+                               continue;
+
+                       j = util_format_get_first_non_void_channel(format);
+                       if (j == -1)
+                               continue;
+
+                       if (desc->channel[j].size > 8 || !desc->channel[j].normalized ||
+                               desc->channel[j].pure_integer)
+                               continue;
+
+                       /* Just use the first unorm8/snorm8 render buffer. Can't keep
+                        * everyone happy.
+                        */
+                       if (desc->channel[j].type == UTIL_FORMAT_TYPE_SIGNED)
+                               factor = 32767.0;
+                       break;
+               }
+
                OUT_PKT0(ring, REG_A4XX_RB_BLEND_RED, 8);
-               OUT_RING(ring, A4XX_RB_BLEND_RED_UINT(bcolor->color[0] * 65535.0) |
+               OUT_RING(ring, A4XX_RB_BLEND_RED_UINT(bcolor->color[0] * factor) |
                                A4XX_RB_BLEND_RED_FLOAT(bcolor->color[0]));
                OUT_RING(ring, A4XX_RB_BLEND_RED_F32(bcolor->color[0]));
-               OUT_RING(ring, A4XX_RB_BLEND_GREEN_UINT(bcolor->color[1] * 65535.0) |
+               OUT_RING(ring, A4XX_RB_BLEND_GREEN_UINT(bcolor->color[1] * factor) |
                                A4XX_RB_BLEND_GREEN_FLOAT(bcolor->color[1]));
                OUT_RING(ring, A4XX_RB_BLEND_GREEN_F32(bcolor->color[1]));
-               OUT_RING(ring, A4XX_RB_BLEND_BLUE_UINT(bcolor->color[2] * 65535.0) |
+               OUT_RING(ring, A4XX_RB_BLEND_BLUE_UINT(bcolor->color[2] * factor) |
                                A4XX_RB_BLEND_BLUE_FLOAT(bcolor->color[2]));
                OUT_RING(ring, A4XX_RB_BLEND_BLUE_F32(bcolor->color[2]));
-               OUT_RING(ring, A4XX_RB_BLEND_ALPHA_UINT(bcolor->color[3] * 65535.0) |
+               OUT_RING(ring, A4XX_RB_BLEND_ALPHA_UINT(bcolor->color[3] * factor) |
                                A4XX_RB_BLEND_ALPHA_FLOAT(bcolor->color[3]));
                OUT_RING(ring, A4XX_RB_BLEND_ALPHA_F32(bcolor->color[3]));
        }