freedreno: Introduce a "cpp_shift" value for cpp divs/muls.

[mesa.git] / src / gallium / drivers / freedreno / a4xx / fd4_gmem.c

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index 25ca2c4172cbc7a0a8675b6715b131decabbd302..5f565e08d656c3a8f0db7bfd1f7c27b019ae078b 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -44,7 +44,7 @@
 
 static void
 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
-               struct pipe_surface **bufs, uint32_t *bases,
+               struct pipe_surface **bufs, const uint32_t *bases,
                uint32_t bin_w, bool decode_srgb)
 {
        enum a4xx_tile_mode tile_mode;
@@ -97,7 +97,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
                                        psurf->u.tex.first_layer);
 
                        if (bin_w) {
-                               stride = bin_w * rsc->layout.cpp;
+                               stride = bin_w << fdl_cpp_shift(&rsc->layout);
 
                                if (bases) {
                                        base = bases[i];
@@ -132,7 +132,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
 static bool
 use_hw_binning(struct fd_batch *batch)
 {
-       struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
 
        if ((gmem->maxpw * gmem->maxph) > 32)
                return false;
@@ -187,10 +187,10 @@ emit_gmem2mem_surf(struct fd_batch *batch, bool stencil,
 }
 
 static void
-fd4_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
+fd4_emit_tile_gmem2mem(struct fd_batch *batch, const struct fd_tile *tile)
 {
        struct fd_context *ctx = batch->ctx;
-       struct fd_gmem_stateobj *gmem = &ctx->gmem;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
        struct fd_ringbuffer *ring = batch->gmem;
        struct pipe_framebuffer_state *pfb = &batch->framebuffer;
        struct fd4_emit emit = {
@@ -274,9 +274,9 @@ fd4_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
        if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
                struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
                if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH))
-                       emit_gmem2mem_surf(batch, false, ctx->gmem.zsbuf_base[0], pfb->zsbuf);
+                       emit_gmem2mem_surf(batch, false, gmem->zsbuf_base[0], pfb->zsbuf);
                if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL))
-                       emit_gmem2mem_surf(batch, true, ctx->gmem.zsbuf_base[1], pfb->zsbuf);
+                       emit_gmem2mem_surf(batch, true, gmem->zsbuf_base[1], pfb->zsbuf);
        }
 
        if (batch->resolve & FD_BUFFER_COLOR) {
@@ -300,7 +300,7 @@ fd4_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
 /* transfer from system memory to gmem */
 
 static void
-emit_mem2gmem_surf(struct fd_batch *batch, uint32_t *bases,
+emit_mem2gmem_surf(struct fd_batch *batch, const uint32_t *bases,
                struct pipe_surface **bufs, uint32_t nr_bufs, uint32_t bin_w)
 {
        struct fd_ringbuffer *ring = batch->gmem;
@@ -325,10 +325,10 @@ emit_mem2gmem_surf(struct fd_batch *batch, uint32_t *bases,
 }
 
 static void
-fd4_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile)
+fd4_emit_tile_mem2gmem(struct fd_batch *batch, const struct fd_tile *tile)
 {
        struct fd_context *ctx = batch->ctx;
-       struct fd_gmem_stateobj *gmem = &ctx->gmem;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
        struct fd_ringbuffer *ring = batch->gmem;
        struct pipe_framebuffer_state *pfb = &batch->framebuffer;
        struct fd4_emit emit = {
@@ -561,6 +561,7 @@ static void
 update_vsc_pipe(struct fd_batch *batch)
 {
        struct fd_context *ctx = batch->ctx;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
        struct fd4_context *fd4_ctx = fd4_context(ctx);
        struct fd_ringbuffer *ring = batch->gmem;
        int i;
@@ -570,7 +571,7 @@ update_vsc_pipe(struct fd_batch *batch)
 
        OUT_PKT0(ring, REG_A4XX_VSC_PIPE_CONFIG_REG(0), 8);
        for (i = 0; i < 8; i++) {
-               struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
+               const struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
                OUT_RING(ring, A4XX_VSC_PIPE_CONFIG_REG_X(pipe->x) |
                                A4XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) |
                                A4XX_VSC_PIPE_CONFIG_REG_W(pipe->w) |
@@ -595,8 +596,7 @@ update_vsc_pipe(struct fd_batch *batch)
 static void
 emit_binning_pass(struct fd_batch *batch)
 {
-       struct fd_context *ctx = batch->ctx;
-       struct fd_gmem_stateobj *gmem = &ctx->gmem;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
        struct pipe_framebuffer_state *pfb = &batch->framebuffer;
        struct fd_ringbuffer *ring = batch->gmem;
        int i;
@@ -663,7 +663,7 @@ fd4_emit_tile_init(struct fd_batch *batch)
 {
        struct fd_ringbuffer *ring = batch->gmem;
        struct pipe_framebuffer_state *pfb = &batch->framebuffer;
-       struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
 
        fd4_emit_restore(batch, ring);
 
@@ -704,12 +704,11 @@ fd4_emit_tile_init(struct fd_batch *batch)
 
 /* before mem2gmem */
 static void
-fd4_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
+fd4_emit_tile_prep(struct fd_batch *batch, const struct fd_tile *tile)
 {
-       struct fd_context *ctx = batch->ctx;
        struct fd_ringbuffer *ring = batch->gmem;
        struct pipe_framebuffer_state *pfb = &batch->framebuffer;
-       struct fd_gmem_stateobj *gmem = &ctx->gmem;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
 
        if (pfb->zsbuf) {
                struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
@@ -752,12 +751,12 @@ fd4_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
 
 /* before IB to rendering cmds: */
 static void
-fd4_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile)
+fd4_emit_tile_renderprep(struct fd_batch *batch, const struct fd_tile *tile)
 {
        struct fd_context *ctx = batch->ctx;
        struct fd4_context *fd4_ctx = fd4_context(ctx);
        struct fd_ringbuffer *ring = batch->gmem;
-       struct fd_gmem_stateobj *gmem = &ctx->gmem;
+       const struct fd_gmem_stateobj *gmem = batch->gmem_state;
        struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 
        uint32_t x1 = tile->xoff;
@@ -766,7 +765,7 @@ fd4_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile)
        uint32_t y2 = tile->yoff + tile->bin_h - 1;
 
        if (use_hw_binning(batch)) {
-               struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
+               const struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[tile->p];
                struct fd_bo *pipe_bo = ctx->vsc_pipe_bo[tile->p];
 
                assert(pipe->w && pipe->h);