nir: Offset vertex_id by first_vertex instead of base_vertex
[mesa.git] / src / gallium / drivers / freedreno / a4xx / fd4_screen.c
index df5ac6e6cadc959b164d38593b63c5481c5f4632..1b81f8db2f354154ed5990e826e22a2356d031bb 100644 (file)
@@ -31,7 +31,8 @@
 
 #include "fd4_screen.h"
 #include "fd4_context.h"
-#include "fd4_util.h"
+#include "fd4_format.h"
+#include "ir3_compiler.h"
 
 static boolean
 fd4_screen_is_format_supported(struct pipe_screen *pscreen,
@@ -51,12 +52,14 @@ fd4_screen_is_format_supported(struct pipe_screen *pscreen,
        }
 
        if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
-                       (fd4_pipe2vtx(format) != ~0)) {
+                       (fd4_pipe2vtx(format) != (enum a4xx_vtx_fmt)~0)) {
                retval |= PIPE_BIND_VERTEX_BUFFER;
        }
 
        if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
-                       (fd4_pipe2tex(format) != ~0)) {
+                       (target == PIPE_BUFFER ||
+                        util_format_get_blocksize(format) != 12) &&
+                       (fd4_pipe2tex(format) != (enum a4xx_tex_fmt)~0)) {
                retval |= PIPE_BIND_SAMPLER_VIEW;
        }
 
@@ -64,30 +67,30 @@ fd4_screen_is_format_supported(struct pipe_screen *pscreen,
                                PIPE_BIND_DISPLAY_TARGET |
                                PIPE_BIND_SCANOUT |
                                PIPE_BIND_SHARED)) &&
-                       (fd4_pipe2color(format) != ~0) &&
-                       (fd4_pipe2tex(format) != ~0)) {
+                       (fd4_pipe2color(format) != (enum a4xx_color_fmt)~0) &&
+                       (fd4_pipe2tex(format) != (enum a4xx_tex_fmt)~0)) {
                retval |= usage & (PIPE_BIND_RENDER_TARGET |
                                PIPE_BIND_DISPLAY_TARGET |
                                PIPE_BIND_SCANOUT |
                                PIPE_BIND_SHARED);
        }
 
+       /* For ARB_framebuffer_no_attachments: */
+       if ((usage & PIPE_BIND_RENDER_TARGET) && (format == PIPE_FORMAT_NONE)) {
+               retval |= usage & PIPE_BIND_RENDER_TARGET;
+       }
+
        if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
-                       (fd4_pipe2depth(format) != ~0) &&
-                       (fd4_pipe2tex(format) != ~0)) {
+                       (fd4_pipe2depth(format) != (enum a4xx_depth_format)~0) &&
+                       (fd4_pipe2tex(format) != (enum a4xx_tex_fmt)~0)) {
                retval |= PIPE_BIND_DEPTH_STENCIL;
        }
 
        if ((usage & PIPE_BIND_INDEX_BUFFER) &&
-                       (fd_pipe2index(format) != ~0)) {
+                       (fd_pipe2index(format) != (enum pc_di_index_size)~0)) {
                retval |= PIPE_BIND_INDEX_BUFFER;
        }
 
-       if (usage & PIPE_BIND_TRANSFER_READ)
-               retval |= PIPE_BIND_TRANSFER_READ;
-       if (usage & PIPE_BIND_TRANSFER_WRITE)
-               retval |= PIPE_BIND_TRANSFER_WRITE;
-
        if (retval != usage) {
                DBG("not supported: format=%s, target=%d, sample_count=%d, "
                                "usage=%x, retval=%x", util_format_name(format),
@@ -100,6 +103,9 @@ fd4_screen_is_format_supported(struct pipe_screen *pscreen,
 void
 fd4_screen_init(struct pipe_screen *pscreen)
 {
+       struct fd_screen *screen = fd_screen(pscreen);
+       screen->max_rts = A4XX_MAX_RENDER_TARGETS;
+       screen->compiler = ir3_compiler_create(screen->dev, screen->gpu_id);
        pscreen->context_create = fd4_context_create;
        pscreen->is_format_supported = fd4_screen_is_format_supported;
 }