freedreno/a5xx+a6xx: use sysmem path for nondraw batches
[mesa.git] / src / gallium / drivers / freedreno / a5xx / fd5_blitter.c
index a2db58734c720f084aff9ab778be4c84a706454c..53fbb77b0921a222c1c3e42cd290ab4fdd673f8e 100644 (file)
@@ -153,23 +153,6 @@ can_do_blit(const struct pipe_blit_info *info)
 static void
 emit_setup(struct fd_ringbuffer *ring)
 {
-       OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-       OUT_RING(ring, LRZ_FLUSH);
-
-       OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
-       OUT_RING(ring, 0x0);
-
-       OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1);
-       OUT_RING(ring, 0x00000003);   /* PC_POWER_CNTL */
-
-       OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1);
-       OUT_RING(ring, 0x00000003);   /* VFD_POWER_CNTL */
-
-       /* 0x10000000 for BYPASS.. 0x7c13c080 for GMEM: */
-       OUT_WFI5(ring);
-       OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1);
-       OUT_RING(ring, 0x10000000);   /* RB_CCU_CNTL */
-
        OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1);
        OUT_RING(ring, 0x00000008);
 
@@ -459,9 +442,6 @@ fd5_blitter_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
 
        batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
 
-       fd5_emit_restore(batch, batch->draw);
-       fd5_emit_lrz_flush(batch->draw);
-
        emit_setup(batch->draw);
 
        if ((info->src.resource->target == PIPE_BUFFER) &&