freedreno: reorder format check

[mesa.git] / src / gallium / drivers / freedreno / a5xx / fd5_gmem.c

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index ae73bc181ba3549bd852b1bb88fefab3af4757a3..3380f8f63812cae96edf69d1b55f382c6d9545e4 100644 (file)
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -28,7 +28,7 @@
 #include "util/u_string.h"
 #include "util/u_memory.h"
 #include "util/u_inlines.h"
-#include "util/u_format.h"
+#include "util/format/u_format.h"
 
 #include "freedreno_draw.h"
 #include "freedreno_state.h"
@@ -54,7 +54,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
                enum a3xx_color_swap swap = WZYX;
                bool srgb = false, sint = false, uint = false;
                struct fd_resource *rsc = NULL;
-               struct fd_resource_slice *slice = NULL;
+               struct fdl_slice *slice = NULL;
                uint32_t stride = 0;
                uint32_t size = 0;
                uint32_t base = 0;
@@ -85,15 +85,14 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
                                        psurf->u.tex.first_layer);
 
                        if (gmem) {
-                               stride = gmem->bin_w * rsc->cpp;
+                               stride = gmem->bin_w * gmem->cbuf_cpp[i];
                                size = stride * gmem->bin_h;
                                base = gmem->cbuf_base[i];
                        } else {
-                               stride = slice->pitch * rsc->cpp;
+                               stride = slice->pitch * rsc->layout.cpp;
                                size = slice->size0;
 
-                               if (!fd_resource_level_linear(psurf->texture, psurf->u.tex.level))
-                                       tile_mode = rsc->tile_mode;
+                               tile_mode = fd_resource_tile_mode(psurf->texture, psurf->u.tex.level);
                        }
                }
 
@@ -137,7 +136,7 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
        if (zsbuf) {
                struct fd_resource *rsc = fd_resource(zsbuf->texture);
                enum a5xx_depth_format fmt = fd5_pipe2depth(zsbuf->format);
-               uint32_t cpp = rsc->cpp;
+               uint32_t cpp = rsc->layout.cpp;
                uint32_t stride = 0;
                uint32_t size = 0;
 
@@ -145,8 +144,8 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
                        stride = cpp * gmem->bin_w;
                        size = stride * gmem->bin_h;
                } else {
-                       struct fd_resource_slice *slice = fd_resource_slice(rsc, 0);
-                       stride = slice->pitch * rsc->cpp;
+                       struct fdl_slice *slice = fd_resource_slice(rsc, 0);
+                       stride = slice->pitch * rsc->layout.cpp;
                        size = slice->size0;
                }
 
@@ -192,8 +191,8 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
                                stride = 1 * gmem->bin_w;
                                size = stride * gmem->bin_h;
                        } else {
-                               struct fd_resource_slice *slice = fd_resource_slice(rsc->stencil, 0);
-                               stride = slice->pitch * rsc->cpp;
+                               struct fdl_slice *slice = fd_resource_slice(rsc->stencil, 0);
+                               stride = slice->pitch * rsc->layout.cpp;
                                size = slice->size0;
                        }
 
@@ -255,7 +254,7 @@ patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
                struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
                *patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
        }
-       util_dynarray_resize(&batch->draw_patches, 0);
+       util_dynarray_clear(&batch->draw_patches);
 }
 
 static void
@@ -290,7 +289,7 @@ update_vsc_pipe(struct fd_batch *batch)
                struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
                if (!pipe->bo) {
                        pipe->bo = fd_bo_new(ctx->dev, 0x20000,
-                                       DRM_FREEDRENO_GEM_TYPE_KMEM);
+                                       DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_pipe[%u]", i);
                }
                OUT_RELOCW(ring, pipe->bo, 0, 0, 0);     /* VSC_PIPE_DATA_ADDRESS[i].LO/HI */
        }
@@ -345,7 +344,7 @@ emit_binning_pass(struct fd_batch *batch)
                        A5XX_RB_WINDOW_OFFSET_Y(0));
 
        /* emit IB to binning drawcmds: */
-       ctx->emit_ib(ring, batch->binning);
+       fd5_emit_ib(ring, batch->binning);
 
        fd_reset_wfi(batch);
 
@@ -376,7 +375,7 @@ fd5_emit_tile_init(struct fd_batch *batch)
        fd5_emit_restore(batch, ring);
 
        if (batch->lrz_clear)
-               ctx->emit_ib(ring, batch->lrz_clear);
+               fd5_emit_ib(ring, batch->lrz_clear);
 
        fd5_emit_lrz_flush(ring);
 
@@ -485,22 +484,22 @@ emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base,
                // possibly we want to flip this around gmem2mem and keep depth
                // tiled in sysmem (and fixup sampler state to assume tiled).. this
                // might be required for doing depth/stencil in bypass mode?
-               struct fd_resource_slice *slice = fd_resource_slice(rsc, 0);
+               struct fdl_slice *slice = fd_resource_slice(rsc, 0);
                enum a5xx_color_fmt format =
                        fd5_pipe2color(fd_gmem_restore_format(rsc->base.format));
 
                OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5);
                OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
-                               A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(rsc->tile_mode) |
+                               A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(rsc->layout.tile_mode) |
                                A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(WZYX));
-               OUT_RING(ring, A5XX_RB_MRT_PITCH(slice->pitch * rsc->cpp));
+               OUT_RING(ring, A5XX_RB_MRT_PITCH(slice->pitch * rsc->layout.cpp));
                OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(slice->size0));
                OUT_RELOC(ring, rsc->bo, 0, 0, 0);  /* BASE_LO/HI */
 
                buf = BLIT_MRT0;
        }
 
-       stride = gmem->bin_w * rsc->cpp;
+       stride = gmem->bin_w * rsc->layout.cpp;
        size = stride * gmem->bin_h;
 
        OUT_PKT4(ring, REG_A5XX_RB_BLIT_FLAG_DST_LO, 4);
@@ -580,21 +579,23 @@ fd5_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile)
        emit_zs(ring, pfb->zsbuf, gmem);
        emit_mrt(ring, pfb->nr_cbufs, pfb->cbufs, gmem);
 
-       // TODO MSAA
+       enum a3xx_msaa_samples samples = fd_msaa_samples(pfb->samples);
+
        OUT_PKT4(ring, REG_A5XX_TPL1_TP_RAS_MSAA_CNTL, 2);
-       OUT_RING(ring, A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE));
-       OUT_RING(ring, A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) |
-                       A5XX_TPL1_TP_DEST_MSAA_CNTL_MSAA_DISABLE);
+       OUT_RING(ring, A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(samples));
+       OUT_RING(ring, A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(samples) |
+                       COND(samples == MSAA_ONE, A5XX_TPL1_TP_DEST_MSAA_CNTL_MSAA_DISABLE));
 
        OUT_PKT4(ring, REG_A5XX_RB_RAS_MSAA_CNTL, 2);
-       OUT_RING(ring, A5XX_RB_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE));
-       OUT_RING(ring, A5XX_RB_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) |
-                       A5XX_RB_DEST_MSAA_CNTL_MSAA_DISABLE);
+       OUT_RING(ring, A5XX_RB_RAS_MSAA_CNTL_SAMPLES(samples));
+       OUT_RING(ring, A5XX_RB_DEST_MSAA_CNTL_SAMPLES(samples) |
+                       COND(samples == MSAA_ONE, A5XX_RB_DEST_MSAA_CNTL_MSAA_DISABLE));
+
 
        OUT_PKT4(ring, REG_A5XX_GRAS_SC_RAS_MSAA_CNTL, 2);
-       OUT_RING(ring, A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE));
-       OUT_RING(ring, A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) |
-                       A5XX_GRAS_SC_DEST_MSAA_CNTL_MSAA_DISABLE);
+       OUT_RING(ring, A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(samples));
+       OUT_RING(ring, A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(samples) |
+                       COND(samples == MSAA_ONE, A5XX_GRAS_SC_DEST_MSAA_CNTL_MSAA_DISABLE));
 }
 
 
@@ -608,10 +609,13 @@ emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base,
 {
        struct fd_ringbuffer *ring = batch->gmem;
        struct fd_resource *rsc = fd_resource(psurf->texture);
-       struct fd_resource_slice *slice;
+       struct fdl_slice *slice;
        bool tiled;
        uint32_t offset;
 
+       if (!rsc->valid)
+               return;
+
        if (buf == BLIT_S)
                rsc = rsc->stencil;
 
@@ -627,19 +631,23 @@ emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base,
        OUT_RING(ring, 0x00000000);   /* RB_BLIT_FLAG_DST_PITCH */
        OUT_RING(ring, 0x00000000);   /* RB_BLIT_FLAG_DST_ARRAY_PITCH */
 
-       tiled = rsc->tile_mode &&
-               !fd_resource_level_linear(psurf->texture, psurf->u.tex.level);
+       tiled = fd_resource_tile_mode(psurf->texture, psurf->u.tex.level);
 
        OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_3, 5);
        OUT_RING(ring, 0x00000004 |   /* XXX RB_RESOLVE_CNTL_3 */
                        COND(tiled, A5XX_RB_RESOLVE_CNTL_3_TILED));
        OUT_RELOCW(ring, rsc->bo, offset, 0, 0);     /* RB_BLIT_DST_LO/HI */
-       OUT_RING(ring, A5XX_RB_BLIT_DST_PITCH(slice->pitch * rsc->cpp));
+       OUT_RING(ring, A5XX_RB_BLIT_DST_PITCH(slice->pitch * rsc->layout.cpp));
        OUT_RING(ring, A5XX_RB_BLIT_DST_ARRAY_PITCH(slice->size0));
 
        OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1);
        OUT_RING(ring, A5XX_RB_BLIT_CNTL_BUF(buf));
 
+//     bool msaa_resolve = pfb->samples > 1;
+       bool msaa_resolve = false;
+       OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1);
+       OUT_RING(ring, COND(msaa_resolve, A5XX_RB_CLEAR_CNTL_MSAA_RESOLVE));
+
        fd5_emit_blit(batch->ctx, ring);
 }
 
@@ -700,7 +708,7 @@ fd5_emit_sysmem_prep(struct fd_batch *batch)
        OUT_RING(ring, 0x0);
 
        OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-       OUT_RING(ring, UNK_19);
+       OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
 
        OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1);
        OUT_RING(ring, 0x00000003);   /* PC_POWER_CNTL */
@@ -742,7 +750,6 @@ fd5_emit_sysmem_prep(struct fd_batch *batch)
        emit_zs(ring, pfb->zsbuf, NULL);
        emit_mrt(ring, pfb->nr_cbufs, pfb->cbufs, NULL);
 
-       // TODO MSAA
        OUT_PKT4(ring, REG_A5XX_TPL1_TP_RAS_MSAA_CNTL, 2);
        OUT_RING(ring, A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE));
        OUT_RING(ring, A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) |