a5xx: set uint/sint bits for mrt output register

[mesa.git] / src / gallium / drivers / freedreno / a5xx / fd5_gmem.c

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index d82315a7082e8b062cf83ffe7ef51a236659dd3a..c623b572be5b2678e7c4ae257e9a1c4da23e6898 100644 (file)
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -58,7 +58,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
        for (i = 0; i < A5XX_MAX_RENDER_TARGETS; i++) {
                enum a5xx_color_fmt format = 0;
                enum a3xx_color_swap swap = WZYX;
-               bool srgb = false;
+               bool srgb = false, sint = false, uint = false;
                struct fd_resource *rsc = NULL;
                struct fd_resource_slice *slice = NULL;
                uint32_t stride = 0;
@@ -76,6 +76,8 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
                        format = fd5_pipe2color(pformat);
                        swap = fd5_pipe2swap(pformat);
                        srgb = util_format_is_srgb(pformat);
+                       sint = util_format_is_pure_sint(pformat);
+                       uint = util_format_is_pure_uint(pformat);
 
                        debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
 
@@ -110,6 +112,8 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
 
                OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1);
                OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format) |
+                               COND(sint, A5XX_SP_FS_MRT_REG_COLOR_SINT) |
+                               COND(uint, A5XX_SP_FS_MRT_REG_COLOR_UINT) |
                                COND(srgb, A5XX_SP_FS_MRT_REG_COLOR_SRGB));
 
                /* when we support UBWC, these would be the system memory