if (fmt == FMT6_NONE)
return false;
- if (fmt == FMT6_10_10_10_2_UNORM_DEST)
- return false;
-
return true;
}
OUT_RING(ring, fd6_context(batch->ctx)->magic.RB_CCU_CNTL_bypass);
}
-static uint32_t
-blit_control(enum a6xx_format fmt, bool is_srgb)
+static void
+emit_blit_setup(struct fd_ringbuffer *ring,
+ enum pipe_format pfmt, bool scissor_enable, union pipe_color_union *color)
{
+ enum a6xx_format fmt = fd6_pipe2color(pfmt);
+ bool is_srgb = util_format_is_srgb(pfmt);
enum a6xx_2d_ifmt ifmt = fd6_ifmt(fmt);
+ OUT_PKT7(ring, CP_SET_MARKER, 1);
+ OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
+
if (is_srgb) {
assert(ifmt == R2D_UNORM8);
ifmt = R2D_UNORM8_SRGB;
}
- return A6XX_RB_2D_BLIT_CNTL_MASK(0xf) |
+ uint32_t blit_cntl = A6XX_RB_2D_BLIT_CNTL_MASK(0xf) |
A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt) |
- A6XX_RB_2D_BLIT_CNTL_IFMT(ifmt);
+ A6XX_RB_2D_BLIT_CNTL_IFMT(ifmt) |
+ COND(color, A6XX_RB_2D_BLIT_CNTL_SOLID_COLOR) |
+ COND(scissor_enable, A6XX_RB_2D_BLIT_CNTL_SCISSOR);
+
+ OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
+ OUT_RING(ring, blit_cntl);
+
+ OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
+ OUT_RING(ring, blit_cntl);
+
+ if (fmt == FMT6_10_10_10_2_UNORM_DEST)
+ fmt = FMT6_16_16_16_16_FLOAT;
+
+ /* This register is probably badly named... it seems that it's
+ * controlling the internal/accumulator format or something like
+ * that. It's certainly not tied to only the src format.
+ */
+ OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
+ OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(fmt) |
+ COND(util_format_is_pure_sint(pfmt),
+ A6XX_SP_2D_SRC_FORMAT_SINT) |
+ COND(util_format_is_pure_uint(pfmt),
+ A6XX_SP_2D_SRC_FORMAT_UINT) |
+ COND(util_format_is_snorm(pfmt),
+ A6XX_SP_2D_SRC_FORMAT_SINT |
+ A6XX_SP_2D_SRC_FORMAT_NORM) |
+ COND(util_format_is_unorm(pfmt),
+// TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
+// A6XX_SP_2D_SRC_FORMAT_UINT |
+ A6XX_SP_2D_SRC_FORMAT_NORM) |
+ COND(is_srgb, A6XX_SP_2D_SRC_FORMAT_SRGB) |
+ A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
+
+ OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
+ OUT_RING(ring, 0);
}
/* buffers need to be handled specially since x/width can exceed the bounds
sshift = sbox->x & 0x3f;
dshift = dbox->x & 0x3f;
- OUT_PKT7(ring, CP_SET_MARKER, 1);
- OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
-
- uint32_t blit_cntl = blit_control(FMT6_8_UNORM, false) | 0x20000000;
- OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
- OUT_RING(ring, blit_cntl);
-
- OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
- OUT_RING(ring, blit_cntl);
+ emit_blit_setup(ring, PIPE_FORMAT_R8_UNORM, false, NULL);
for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
unsigned soff, doff, w, p;
OUT_RING(ring, 0x3f);
OUT_WFI5(ring);
- OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
- OUT_RING(ring, 0);
-
- OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
- OUT_RING(ring, 0xf180);
-
OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
const struct pipe_box *sbox = &info->src.box;
const struct pipe_box *dbox = &info->dst.box;
struct fd_resource *dst;
- enum a6xx_format sfmt, dfmt;
+ enum a6xx_format dfmt;
int sx1, sy1, sx2, sy2;
int dx1, dy1, dx2, dy2;
dst = fd_resource(info->dst.resource);
- sfmt = fd6_pipe2color(info->src.format);
dfmt = fd6_pipe2color(info->dst.format);
uint32_t nr_samples = fd_resource_nr_samples(&dst->base);
- sx1 = sbox->x * nr_samples;
- sy1 = sbox->y;
- sx2 = (sbox->x + sbox->width) * nr_samples - 1;
- sy2 = sbox->y + sbox->height - 1;
+
+ if (!color) {
+ sx1 = sbox->x * nr_samples;
+ sy1 = sbox->y;
+ sx2 = (sbox->x + sbox->width) * nr_samples - 1;
+ sy2 = sbox->y + sbox->height - 1;
+
+ OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
+ OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
+ OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
+ OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
+ OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
+ }
dx1 = dbox->x * nr_samples;
dy1 = dbox->y;
dx2 = (dbox->x + dbox->width) * nr_samples - 1;
dy2 = dbox->y + dbox->height - 1;
- OUT_PKT7(ring, CP_SET_MARKER, 1);
- OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
-
- uint32_t blit_cntl = blit_control(dfmt, util_format_is_srgb(info->dst.format));
+ OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
+ OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
+ OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
if (color) {
- blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SOLID_COLOR;
-
switch (info->dst.format) {
case PIPE_FORMAT_Z24X8_UNORM:
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
OUT_RING(ring, _mesa_float_to_half(color->f[1]));
OUT_RING(ring, _mesa_float_to_half(color->f[2]));
OUT_RING(ring, _mesa_float_to_half(color->f[3]));
- sfmt = FMT6_16_16_16_16_FLOAT;
break;
case R2D_FLOAT32:
case R2D_INT32:
A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
- blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
}
- OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
- OUT_RING(ring, blit_cntl);
-
- OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
- OUT_RING(ring, blit_cntl);
+ emit_blit_setup(ring, info->dst.format, info->scissor_enable, color);
for (unsigned i = 0; i < info->dst.box.depth; i++) {
- emit_blit_src(ring, info, sbox->z + i, nr_samples);
+ if (!color)
+ emit_blit_src(ring, info, sbox->z + i, nr_samples);
emit_blit_dst(ring, info, dbox->z + i);
/*
* Blit command:
*/
- OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
- OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
- OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
- OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
- OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
-
- OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
- OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
- OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
-
OUT_PKT7(ring, CP_EVENT_WRITE, 1);
OUT_RING(ring, 0x3f);
OUT_WFI5(ring);
- OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
- OUT_RING(ring, 0);
-
- if (dfmt == FMT6_10_10_10_2_UNORM_DEST)
- sfmt = FMT6_16_16_16_16_FLOAT;
-
- /* This register is probably badly named... it seems that it's
- * controlling the internal/accumulator format or something like
- * that. It's certainly not tied to only the src format.
- */
- OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
- OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt) |
- COND(util_format_is_pure_sint(info->src.format),
- A6XX_SP_2D_SRC_FORMAT_SINT) |
- COND(util_format_is_pure_uint(info->src.format),
- A6XX_SP_2D_SRC_FORMAT_UINT) |
- COND(util_format_is_snorm(info->src.format),
- A6XX_SP_2D_SRC_FORMAT_SINT |
- A6XX_SP_2D_SRC_FORMAT_NORM) |
- COND(util_format_is_unorm(info->src.format),
-// TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
-// A6XX_SP_2D_SRC_FORMAT_UINT |
- A6XX_SP_2D_SRC_FORMAT_NORM) |
- COND(util_format_is_srgb(info->dst.format), A6XX_SP_2D_SRC_FORMAT_SRGB) |
- A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
-
OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
projects / mesa.git / blobdiff