freedreno/a6xx: Program RB_UNKNOWN_8C01 in setup helper

[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index 8599dfa5aed12ec151556cac0251d2a581e08361..c4917c335052889ca2923d569e17d962df958049 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -232,14 +232,17 @@ emit_setup(struct fd_batch *batch)
        OUT_RING(ring, fd6_context(batch->ctx)->magic.RB_CCU_CNTL_bypass);
 }
 
-static uint32_t
-emit_blit_control(struct fd_ringbuffer *ring,
+static void
+emit_blit_setup(struct fd_ringbuffer *ring,
                enum pipe_format pfmt, bool scissor_enable, union pipe_color_union *color)
 {
        enum a6xx_format fmt = fd6_pipe2color(pfmt);
        bool is_srgb = util_format_is_srgb(pfmt);
        enum a6xx_2d_ifmt ifmt = fd6_ifmt(fmt);
 
+       OUT_PKT7(ring, CP_SET_MARKER, 1);
+       OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
+
        if (is_srgb) {
                assert(ifmt == R2D_UNORM8);
                ifmt = R2D_UNORM8_SRGB;
@@ -256,6 +259,32 @@ emit_blit_control(struct fd_ringbuffer *ring,
 
        OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
        OUT_RING(ring, blit_cntl);
+
+       if (fmt == FMT6_10_10_10_2_UNORM_DEST)
+               fmt = FMT6_16_16_16_16_FLOAT;
+
+       /* This register is probably badly named... it seems that it's
+        * controlling the internal/accumulator format or something like
+        * that. It's certainly not tied to only the src format.
+        */
+       OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
+       OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(fmt) |
+                       COND(util_format_is_pure_sint(pfmt),
+                                       A6XX_SP_2D_SRC_FORMAT_SINT) |
+                       COND(util_format_is_pure_uint(pfmt),
+                                       A6XX_SP_2D_SRC_FORMAT_UINT) |
+                       COND(util_format_is_snorm(pfmt),
+                                       A6XX_SP_2D_SRC_FORMAT_SINT |
+                                               A6XX_SP_2D_SRC_FORMAT_NORM) |
+                       COND(util_format_is_unorm(pfmt),
+// TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
+//                                             A6XX_SP_2D_SRC_FORMAT_UINT |
+                                       A6XX_SP_2D_SRC_FORMAT_NORM) |
+                       COND(is_srgb, A6XX_SP_2D_SRC_FORMAT_SRGB) |
+                       A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
+
+       OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
+       OUT_RING(ring, 0);
 }
 
 /* buffers need to be handled specially since x/width can exceed the bounds
@@ -315,10 +344,7 @@ emit_blit_buffer(struct fd_context *ctx, struct fd_ringbuffer *ring,
        sshift = sbox->x & 0x3f;
        dshift = dbox->x & 0x3f;
 
-       OUT_PKT7(ring, CP_SET_MARKER, 1);
-       OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
-
-       emit_blit_control(ring, PIPE_FORMAT_R8_UNORM, false, NULL);
+       emit_blit_setup(ring, PIPE_FORMAT_R8_UNORM, false, NULL);
 
        for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
                unsigned soff, doff, w, p;
@@ -383,12 +409,6 @@ emit_blit_buffer(struct fd_context *ctx, struct fd_ringbuffer *ring,
                OUT_RING(ring, 0x3f);
                OUT_WFI5(ring);
 
-               OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
-               OUT_RING(ring, 0);
-
-               OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
-               OUT_RING(ring, 0xf180);
-
                OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
                OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
 
@@ -498,7 +518,7 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
        const struct pipe_box *sbox = &info->src.box;
        const struct pipe_box *dbox = &info->dst.box;
        struct fd_resource *dst;
-       enum a6xx_format sfmt, dfmt;
+       enum a6xx_format dfmt;
        int sx1, sy1, sx2, sy2;
        int dx1, dy1, dx2, dy2;
 
@@ -514,12 +534,8 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
        dst = fd_resource(info->dst.resource);
 
-       sfmt = fd6_pipe2color(info->src.format);
        dfmt = fd6_pipe2color(info->dst.format);
 
-       OUT_PKT7(ring, CP_SET_MARKER, 1);
-       OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
-
        uint32_t nr_samples = fd_resource_nr_samples(&dst->base);
 
        if (!color) {
@@ -576,7 +592,6 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
                        OUT_RING(ring, _mesa_float_to_half(color->f[1]));
                        OUT_RING(ring, _mesa_float_to_half(color->f[2]));
                        OUT_RING(ring, _mesa_float_to_half(color->f[3]));
-                       sfmt = FMT6_16_16_16_16_FLOAT;
                        break;
                case R2D_FLOAT32:
                case R2D_INT32:
@@ -599,30 +614,7 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
                                 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
        }
 
-       emit_blit_control(ring, info->dst.format, info->scissor_enable, color);
-
-       if (dfmt == FMT6_10_10_10_2_UNORM_DEST)
-               sfmt = FMT6_16_16_16_16_FLOAT;
-
-       /* This register is probably badly named... it seems that it's
-        * controlling the internal/accumulator format or something like
-        * that. It's certainly not tied to only the src format.
-        */
-       OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
-       OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt) |
-                       COND(util_format_is_pure_sint(info->src.format),
-                                       A6XX_SP_2D_SRC_FORMAT_SINT) |
-                       COND(util_format_is_pure_uint(info->src.format),
-                                       A6XX_SP_2D_SRC_FORMAT_UINT) |
-                       COND(util_format_is_snorm(info->src.format),
-                                       A6XX_SP_2D_SRC_FORMAT_SINT |
-                                               A6XX_SP_2D_SRC_FORMAT_NORM) |
-                       COND(util_format_is_unorm(info->src.format),
-// TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
-//                                             A6XX_SP_2D_SRC_FORMAT_UINT |
-                                       A6XX_SP_2D_SRC_FORMAT_NORM) |
-                       COND(util_format_is_srgb(info->dst.format), A6XX_SP_2D_SRC_FORMAT_SRGB) |
-                       A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
+       emit_blit_setup(ring, info->dst.format, info->scissor_enable, color);
 
        for (unsigned i = 0; i < info->dst.box.depth; i++) {
 
@@ -638,9 +630,6 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
                OUT_RING(ring, 0x3f);
                OUT_WFI5(ring);
 
-               OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
-               OUT_RING(ring, 0);
-
                OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
                OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);