#include "fd6_draw.h"
#include "fd6_emit.h"
#include "fd6_gmem.h"
+#include "fd6_image.h"
#include "fd6_program.h"
#include "fd6_query.h"
#include "fd6_rasterizer.h"
fd_context_destroy(pctx);
- fd_bo_del(fd6_ctx->vsc_data);
- fd_bo_del(fd6_ctx->vsc_data2);
- fd_bo_del(fd6_ctx->blit_mem);
+ if (fd6_ctx->vsc_data)
+ fd_bo_del(fd6_ctx->vsc_data);
+ if (fd6_ctx->vsc_data2)
+ fd_bo_del(fd6_ctx->vsc_data2);
+ fd_bo_del(fd6_ctx->control_mem);
fd_context_cleanup_common_vbos(&fd6_ctx->base);
}
static const uint8_t primtypes[] = {
- [PIPE_PRIM_POINTS] = DI_PT_POINTLIST,
- [PIPE_PRIM_LINES] = DI_PT_LINELIST,
- [PIPE_PRIM_LINE_STRIP] = DI_PT_LINESTRIP,
- [PIPE_PRIM_LINE_LOOP] = DI_PT_LINELOOP,
- [PIPE_PRIM_TRIANGLES] = DI_PT_TRILIST,
- [PIPE_PRIM_TRIANGLE_STRIP] = DI_PT_TRISTRIP,
- [PIPE_PRIM_TRIANGLE_FAN] = DI_PT_TRIFAN,
- [PIPE_PRIM_MAX] = DI_PT_RECTLIST, /* internal clear blits */
+ [PIPE_PRIM_POINTS] = DI_PT_POINTLIST,
+ [PIPE_PRIM_LINES] = DI_PT_LINELIST,
+ [PIPE_PRIM_LINE_STRIP] = DI_PT_LINESTRIP,
+ [PIPE_PRIM_LINE_LOOP] = DI_PT_LINELOOP,
+ [PIPE_PRIM_TRIANGLES] = DI_PT_TRILIST,
+ [PIPE_PRIM_TRIANGLE_STRIP] = DI_PT_TRISTRIP,
+ [PIPE_PRIM_TRIANGLE_FAN] = DI_PT_TRIFAN,
+ [PIPE_PRIM_LINES_ADJACENCY] = DI_PT_LINE_ADJ,
+ [PIPE_PRIM_LINE_STRIP_ADJACENCY] = DI_PT_LINESTRIP_ADJ,
+ [PIPE_PRIM_TRIANGLES_ADJACENCY] = DI_PT_TRI_ADJ,
+ [PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY] = DI_PT_TRISTRIP_ADJ,
+ [PIPE_PRIM_PATCHES] = DI_PT_PATCHES0,
+ [PIPE_PRIM_MAX] = DI_PT_RECTLIST, /* internal clear blits */
};
struct pipe_context *
if (!fd6_ctx)
return NULL;
+
+ switch (screen->gpu_id) {
+ case 618:
+/*
+GRAS_BIN_CONTROL:
+RB_BIN_CONTROL:
+ - a618 doesn't appear to set .USE_VIZ; also bin size diffs
+
+RB_CCU_CNTL:
+ - 0x3c400004 -> 0x3e400004
+ - 0x10000000 -> 0x08000000
+
+RB_UNKNOWN_8E04: <-- see stencil-0000.rd.gz
+ - 0x01000000 -> 0x00100000
+
+SP_UNKNOWN_A0F8:
+PC_UNKNOWN_9805:
+ - 0x1 -> 0
+ */
+ fd6_ctx->magic.RB_UNKNOWN_8E04_blit = 0x00100000;
+ fd6_ctx->magic.RB_CCU_CNTL_gmem = 0x3e400004;
+ fd6_ctx->magic.RB_CCU_CNTL_bypass = 0x08000000;
+ fd6_ctx->magic.PC_UNKNOWN_9805 = 0x0;
+ fd6_ctx->magic.SP_UNKNOWN_A0F8 = 0x0;
+ break;
+ case 630:
+ fd6_ctx->magic.RB_UNKNOWN_8E04_blit = 0x01000000;
+ // NOTE: newer blob using 0x3c400004, need to revisit:
+ fd6_ctx->magic.RB_CCU_CNTL_gmem = 0x7c400004;
+ fd6_ctx->magic.RB_CCU_CNTL_bypass = 0x10000000;
+ fd6_ctx->magic.PC_UNKNOWN_9805 = 0x1;
+ fd6_ctx->magic.SP_UNKNOWN_A0F8 = 0x1;
+ break;
+ case 640:
+ fd6_ctx->magic.RB_UNKNOWN_8E04_blit = 0x00100000;
+ fd6_ctx->magic.RB_CCU_CNTL_gmem = 0x7c400000;
+ fd6_ctx->magic.RB_CCU_CNTL_bypass = 0x10000000;
+ fd6_ctx->magic.PC_UNKNOWN_9805 = 0x1;
+ fd6_ctx->magic.SP_UNKNOWN_A0F8 = 0x1;
+ break;
+ default:
+ unreachable("missing magic config");
+ }
+
pctx = &fd6_ctx->base.base;
+ pctx->screen = pscreen;
fd6_ctx->base.dev = fd_device_ref(screen->dev);
fd6_ctx->base.screen = fd_screen(pscreen);
if (!pctx)
return NULL;
+ /* after fd_context_init() to override set_shader_images() */
+ fd6_image_init(pctx);
+
util_blitter_set_texture_multisample(fd6_ctx->base.blitter, true);
/* fd_context_init overwrites delete_rasterizer_state, so set this
pctx->delete_rasterizer_state = fd6_rasterizer_state_delete;
pctx->delete_depth_stencil_alpha_state = fd6_depth_stencil_alpha_state_delete;
- fd6_ctx->vsc_data = fd_bo_new(screen->dev,
- (A6XX_VSC_DATA_PITCH * 32) + 0x100,
- DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_data");
-
- fd6_ctx->vsc_data2 = fd_bo_new(screen->dev,
- A6XX_VSC_DATA2_PITCH * 32,
- DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_data2");
+ /* initial sizes for VSC buffers (or rather the per-pipe sizes
+ * which is used to derive entire buffer size:
+ */
+ fd6_ctx->vsc_data_pitch = 0x440;
+ fd6_ctx->vsc_data2_pitch = 0x1040;
- fd6_ctx->blit_mem = fd_bo_new(screen->dev, 0x1000,
- DRM_FREEDRENO_GEM_TYPE_KMEM, "blit");
+ fd6_ctx->control_mem = fd_bo_new(screen->dev, 0x1000,
+ DRM_FREEDRENO_GEM_TYPE_KMEM, "control");
fd_context_setup_common_vbos(&fd6_ctx->base);