freedreno/a6xx: Let the GPU track streamout offsets

[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_context.h

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.h b/src/gallium/drivers/freedreno/a6xx/fd6_context.h
index 81a22c44e3d8d4a7d74d2f6d9ff80a6220afc548..76183cca14a90443faab52f6dc662cab1798d8a6 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.h
@@ -107,13 +107,19 @@ fd6_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
 struct fd6_control {
        uint32_t seqno;          /* seqno for async CP_EVENT_WRITE, etc */
        uint32_t _pad0;
-       uint32_t flush_base;     /* dummy address for VPC_SO[i].FLUSH_BASE_LO/HI */
+       volatile uint32_t vsc_overflow;
        uint32_t _pad1;
        /* flag set from cmdstream when VSC overflow detected: */
-       volatile uint32_t vsc_overflow;
-       uint32_t _pad2;
        uint32_t vsc_scratch;
+       uint32_t _pad2;
        uint32_t _pad3;
+       uint32_t _pad4;
+
+       /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
+       struct {
+               uint32_t offset;
+               uint32_t pad[7];
+       } flush_base[4];
 };
 
 #define control_ptr(fd6_ctx, member)  \