freedreno/a6xx: Add helper for incrementing regid

[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_program.c

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index 93e2c58b1388f883cff57fc979aeb1ab52889ab9..44c9e8a689bd9ad7d2311f1426e4ea3f64e92627 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -45,7 +45,7 @@ create_shader_stateobj(struct pipe_context *pctx, const struct pipe_shader_state
 {
        struct fd_context *ctx = fd_context(pctx);
        struct ir3_compiler *compiler = ctx->screen->compiler;
-       return ir3_shader_create(compiler, cso, type, &ctx->debug);
+       return ir3_shader_create(compiler, cso, type, &ctx->debug, pctx->screen);
 }
 
 static void *
@@ -287,6 +287,15 @@ setup_stages(struct fd6_program_state *state, struct stage *s, bool binning_pass
        }
 }
 
+static inline uint32_t
+next_regid(uint32_t reg, uint32_t increment)
+{
+       if (reg == regid(63,0))
+               return regid(63,0);
+       else
+               return reg + increment;
+}
+
 static void
 setup_stateobj(struct fd_ringbuffer *ring,
                struct fd6_program_state *state, bool binning_pass)
@@ -305,7 +314,7 @@ setup_stateobj(struct fd_ringbuffer *ring,
 
        pos_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_POS);
        psize_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_PSIZ);
-       vertex_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE);
+       vertex_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_VERTEX_ID);
        instance_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_INSTANCE_ID);
 
        if (s[FS].v->color0_mrt) {
@@ -327,7 +336,7 @@ setup_stateobj(struct fd_ringbuffer *ring,
        samp_mask_regid = ir3_find_sysval_regid(s[FS].v, SYSTEM_VALUE_SAMPLE_MASK_IN);
        face_regid      = ir3_find_sysval_regid(s[FS].v, SYSTEM_VALUE_FRONT_FACE);
        coord_regid     = ir3_find_sysval_regid(s[FS].v, SYSTEM_VALUE_FRAG_COORD);
-       zwcoord_regid   = (coord_regid == regid(63,0)) ? regid(63,0) : (coord_regid + 2);
+       zwcoord_regid   = next_regid(coord_regid, 2);
        vcoord_regid    = ir3_find_sysval_regid(s[FS].v, SYSTEM_VALUE_VARYING_COORD);
        posz_regid      = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DEPTH);
 
@@ -396,7 +405,7 @@ setup_stateobj(struct fd_ringbuffer *ring,
                        A6XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) |
                        A6XX_SP_VS_CTRL_REG0_MERGEDREGS |
                        A6XX_SP_VS_CTRL_REG0_BRANCHSTACK(s[VS].v->branchstack) |
-                       COND(s[VS].v->num_samp > 0, A6XX_SP_VS_CTRL_REG0_PIXLODENABLE));
+                       COND(s[VS].v->need_pixlod, A6XX_SP_VS_CTRL_REG0_PIXLODENABLE));
 
        struct ir3_shader_linkage l = {0};
        ir3_link_shaders(&l, s[VS].v, s[FS].v);
@@ -508,17 +517,17 @@ setup_stateobj(struct fd_ringbuffer *ring,
        OUT_RING(ring, 0xfc);              /* XXX */
 
        OUT_PKT4(ring, REG_A6XX_HLSQ_UNKNOWN_B980, 1);
-       OUT_RING(ring, s[FS].v->total_in > 0 ? 3 : 1);
+       OUT_RING(ring, enable_varyings ? 3 : 1);
 
        OUT_PKT4(ring, REG_A6XX_SP_FS_CTRL_REG0, 1);
        OUT_RING(ring, A6XX_SP_FS_CTRL_REG0_THREADSIZE(fssz) |
-                       COND(s[FS].v->total_in > 0, A6XX_SP_FS_CTRL_REG0_VARYING) |
+                       COND(enable_varyings, A6XX_SP_FS_CTRL_REG0_VARYING) |
                        COND(s[FS].v->frag_coord, A6XX_SP_FS_CTRL_REG0_VARYING) |
                        0x1000000 |
                        A6XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) |
                        A6XX_SP_FS_CTRL_REG0_MERGEDREGS |
                        A6XX_SP_FS_CTRL_REG0_BRANCHSTACK(s[FS].v->branchstack) |
-                       COND(s[FS].v->num_samp > 0, A6XX_SP_FS_CTRL_REG0_PIXLODENABLE));
+                       COND(s[FS].v->need_pixlod, A6XX_SP_FS_CTRL_REG0_PIXLODENABLE));
 
        OUT_PKT4(ring, REG_A6XX_SP_UNKNOWN_A982, 1);
        OUT_RING(ring, 0);        /* XXX */
@@ -614,7 +623,7 @@ setup_stateobj(struct fd_ringbuffer *ring,
        OUT_RING(ring, 0x0000fcfc);   /* VFD_CONTROL_5 */
        OUT_RING(ring, 0x00000000);   /* VFD_CONTROL_6 */
 
-       bool fragz = s[FS].v->has_kill | s[FS].v->writes_pos;
+       bool fragz = s[FS].v->no_earlyz | s[FS].v->writes_pos;
 
        OUT_PKT4(ring, REG_A6XX_RB_DEPTH_PLANE_CNTL, 1);
        OUT_RING(ring, COND(fragz, A6XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z));