freedreno/layout: layout simplifications and pitch from level 0 pitch
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_texture.c
index 19b3716a3d6b81e48f7a947f0fe8405a3043473c..5e6b9010453a957d42056d72f94336f675eafac0 100644 (file)
@@ -263,7 +263,7 @@ fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
                        A6XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
                        A6XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
                so->texconst2 =
-                       A6XX_TEX_CONST_2_PITCHALIGN(rsc->layout.pitchalign) |
+                       A6XX_TEX_CONST_2_PITCHALIGN(rsc->layout.pitchalign - 6) |
                        A6XX_TEX_CONST_2_PITCH(fd_resource_pitch(rsc, lvl));
                so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
                so->ubwc_offset = fd_resource_ubwc_offset(rsc, lvl, cso->u.tex.first_layer);
@@ -312,15 +312,13 @@ fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
        }
 
        if (so->ubwc_enabled) {
-               struct fdl_slice *ubwc_base_slice = &rsc->layout.ubwc_slices[lvl];
-
                uint32_t block_width, block_height;
                fdl6_get_ubwc_blockwidth(&rsc->layout, &block_width, &block_height);
 
                so->texconst3 |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
                so->texconst9 |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(rsc->layout.ubwc_layer_size >> 2);
                so->texconst10 |=
-                       A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_base_slice->pitch) |
+                       A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(fdl_ubwc_pitch(&rsc->layout, lvl)) |
                        A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(u_minify(prsc->width0, lvl), block_width))) |
                        A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(u_minify(prsc->height0, lvl), block_height)));
        }