radeonsi/nir: call nir_serialize only once per shader
[mesa.git] / src / gallium / drivers / freedreno / freedreno_batch_cache.c
index 45cd9c172d3e5522d13ae1448a9194ad13da616e..82b285c9c6ba87d4d5b826b9dc9dcb5f0471d0d7 100644 (file)
@@ -159,7 +159,7 @@ bc_flush(struct fd_batch_cache *cache, struct fd_context *ctx, bool deferred)
                fd_context_unlock(ctx);
 
                for (unsigned i = 0; i < n; i++) {
-                       fd_batch_flush(batches[i], false, false);
+                       fd_batch_flush(batches[i], false);
                }
        }
 
@@ -307,7 +307,7 @@ fd_bc_alloc_batch(struct fd_batch_cache *cache, struct fd_context *ctx, bool non
                 */
                mtx_unlock(&ctx->screen->lock);
                DBG("%p: too many batches!  flush forced!", flush_batch);
-               fd_batch_flush(flush_batch, true, false);
+               fd_batch_flush(flush_batch, true);
                mtx_lock(&ctx->screen->lock);
 
                /* While the resources get cleaned up automatically, the flush_batch
@@ -402,7 +402,7 @@ key_surf(struct key *key, unsigned idx, unsigned pos, struct pipe_surface *psurf
        key->surf[idx].texture = psurf->texture;
        key->surf[idx].u = psurf->u;
        key->surf[idx].pos = pos;
-       key->surf[idx].samples = psurf->nr_samples;
+       key->surf[idx].samples = MAX2(1, psurf->nr_samples);
        key->surf[idx].format = psurf->format;
 }