#include "pipe/p_context.h"
#include "indices/u_primconvert.h"
#include "util/u_blitter.h"
+#include "util/u_double_list.h"
#include "util/u_slab.h"
#include "util/u_string.h"
unsigned num_elements;
};
+/* Bitmask of stages in rendering that a particular query query is
+ * active. Queries will be automatically started/stopped (generating
+ * additional fd_hw_sample_period's) on entrance/exit from stages that
+ * are applicable to the query.
+ *
+ * NOTE: set the stage to NULL at end of IB to ensure no query is still
+ * active. Things aren't going to work out the way you want if a query
+ * is active across IB's (or between tile IB and draw IB)
+ */
+enum fd_render_stage {
+ FD_STAGE_NULL = 0x00,
+ FD_STAGE_DRAW = 0x01,
+ FD_STAGE_CLEAR = 0x02,
+ /* TODO before queries which include MEM2GMEM or GMEM2MEM will
+ * work we will need to call fd_hw_query_prepare() from somewhere
+ * appropriate so that queries in the tiling IB get backed with
+ * memory to write results to.
+ */
+ FD_STAGE_MEM2GMEM = 0x04,
+ FD_STAGE_GMEM2MEM = 0x08,
+ /* used for driver internal draws (ie. util_blitter_blit()): */
+ FD_STAGE_BLIT = 0x10,
+};
+
+#define MAX_HW_SAMPLE_PROVIDERS 4
+struct fd_hw_sample_provider;
+struct fd_hw_sample;
+
struct fd_context {
struct pipe_context base;
+ struct fd_device *dev;
struct fd_screen *screen;
+
struct blitter_context *blitter;
struct primconvert_context *primconvert;
+ /* slab for pipe_transfer allocations: */
struct util_slab_mempool transfer_pool;
+ /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */
+ struct util_slab_mempool sample_pool;
+ struct util_slab_mempool sample_period_pool;
+
+ /* next sample offset.. incremented for each sample in the batch/
+ * submit, reset to zero on next submit.
+ */
+ uint32_t next_sample_offset;
+
+ /* sample-providers for hw queries: */
+ const struct fd_hw_sample_provider *sample_providers[MAX_HW_SAMPLE_PROVIDERS];
+
+ /* cached samples (in case multiple queries need to reference
+ * the same sample snapshot)
+ */
+ struct fd_hw_sample *sample_cache[MAX_HW_SAMPLE_PROVIDERS];
+
+ /* tracking for current stage, to know when to start/stop
+ * any active queries:
+ */
+ enum fd_render_stage stage;
+
+ /* list of active queries: */
+ struct list_head active_queries;
+
+ /* list of queries that are not active, but were active in the
+ * current submit:
+ */
+ struct list_head current_queries;
+
+ /* current query result bo and tile stride: */
+ struct fd_bo *query_bo;
+ uint32_t query_tile_stride;
+
/* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
* DI_PT_x value to use for draw initiator. There are some
* slight differences between generation:
* normally have to wait before resetting to the start of the next
* rb.
*/
- struct fd_ringbuffer *rings[4];
+ struct fd_ringbuffer *rings[8];
unsigned rings_idx;
/* normal draw/clear cmds: */
/* Keep track if WAIT_FOR_IDLE is needed for registers we need
* to update via RMW:
*/
- bool rmw_needs_wfi;
+ bool needs_wfi;
+
+ /* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION? At least on a3xx
+ * it is not a banked context register, so it needs a WFI to update.
+ * Keep track if it has actually changed, to avoid unneeded WFI.
+ * */
+ bool needs_rb_fbd;
/* Keep track of DRAW initiators that need to be patched up depending
* on whether we using binning or not:
}
static INLINE void
-fd_reset_rmw_state(struct fd_context *ctx)
+fd_reset_wfi(struct fd_context *ctx)
{
- ctx->rmw_needs_wfi = true;
+ ctx->needs_wfi = true;
}
-/* emit before a RMW a WAIT_FOR_IDLE only if needed: */
+/* emit a WAIT_FOR_IDLE only if needed, ie. if there has not already
+ * been one since last draw:
+ */
static inline void
-fd_rmw_wfi(struct fd_context *ctx, struct fd_ringbuffer *ring)
+fd_wfi(struct fd_context *ctx, struct fd_ringbuffer *ring)
{
- if (ctx->rmw_needs_wfi) {
+ if (ctx->needs_wfi) {
OUT_WFI(ring);
- ctx->rmw_needs_wfi = false;
+ ctx->needs_wfi = false;
}
}